biosemu: Do not free vga_info->BIOSImage when it is 0xc0000

[oweals/u-boot.git] / drivers / block / ahci.c

diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index dce99adc6b58cfbcf00530c0d84c1963357a5aaf..65086484eeafab864e43d3dfa75160f69346cb63 100644 (file)
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -137,6 +137,33 @@ static void sunxi_dma_init(volatile u8 *port_mmio)
 }
 #endif
 
+int ahci_reset(void __iomem *base)
+{
+       int i = 1000;
+       u32 __iomem *host_ctl_reg = base + HOST_CTL;
+       u32 tmp = readl(host_ctl_reg); /* global controller reset */
+
+       if ((tmp & HOST_RESET) == 0)
+               writel_with_flush(tmp | HOST_RESET, host_ctl_reg);
+
+       /*
+        * reset must complete within 1 second, or
+        * the hardware should be considered fried.
+        */
+       do {
+               udelay(1000);
+               tmp = readl(host_ctl_reg);
+               i--;
+       } while ((i > 0) && (tmp & HOST_RESET));
+
+       if (i == 0) {
+               printf("controller reset failed (0x%x)\n", tmp);
+               return -1;
+       }
+
+       return 0;
+}
+
 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 {
 #ifndef CONFIG_SCSI_AHCI_PLAT
@@ -156,23 +183,9 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
        cap_save &= ((1 << 28) | (1 << 17));
        cap_save |= (1 << 27);  /* Staggered Spin-up. Not needed. */
 
-       /* global controller reset */
-       tmp = readl(mmio + HOST_CTL);
-       if ((tmp & HOST_RESET) == 0)
-               writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
-
-       /* reset must complete within 1 second, or
-        * the hardware should be considered fried.
-        */
-       i = 1000;
-       do {
-               udelay(1000);
-               tmp = readl(mmio + HOST_CTL);
-               if (!i--) {
-                       debug("controller reset failed (0x%x)\n", tmp);
-                       return -1;
-               }
-       } while (tmp & HOST_RESET);
+       ret = ahci_reset(probe_ent->mmio_base);
+       if (ret)
+               return ret;
 
        writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
        writel(cap_save, mmio + HOST_CAP);
@@ -229,7 +242,6 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
                 * already be on in the command register.
                 */
                cmd = readl(port_mmio + PORT_CMD);
-               cmd |= PORT_CMD_FIS_RX;
                cmd |= PORT_CMD_SPIN_UP;
                writel_with_flush(cmd, port_mmio + PORT_CMD);
 
@@ -407,8 +419,9 @@ static int ahci_init_one(pci_dev_t pdev)
        probe_ent->pio_mask = 0x1f;
        probe_ent->udma_mask = 0x7f;    /*Fixme,assume to support UDMA6 */
 
-       pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &probe_ent->mmio_base);
-       debug("ahci mmio_base=0x%08x\n", probe_ent->mmio_base);
+       probe_ent->mmio_base = pci_map_bar(pdev, PCI_BASE_ADDRESS_5,
+                                          PCI_REGION_MEM);
+       debug("ahci mmio_base=0x%p\n", probe_ent->mmio_base);
 
        /* Take from kernel:
         * JMicron-specific fixup:
@@ -501,6 +514,20 @@ static void ahci_set_feature(u8 port)
 }
 #endif
 
+static int wait_spinup(volatile u8 *port_mmio)
+{
+       ulong start;
+       u32 tf_data;
+
+       start = get_timer(0);
+       do {
+               tf_data = readl(port_mmio + PORT_TFDATA);
+               if (!(tf_data & ATA_BUSY))
+                       return 0;
+       } while (get_timer(start) < WAIT_MS_SPINUP);
+
+       return -ETIMEDOUT;
+}
 
 static int ahci_port_start(u8 port)
 {
@@ -567,7 +594,11 @@ static int ahci_port_start(u8 port)
 
        debug("Exit start port %d\n", port);
 
-       return 0;
+       /*
+        * Make sure interface is not busy based on error and status
+        * information from task file data register before proceeding
+        */
+       return wait_spinup(port_mmio);
 }
 
 
@@ -731,7 +762,7 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
                u16 now_blocks; /* number of blocks per iteration */
                u32 transfer_size; /* number of bytes per iteration */
 
-               now_blocks = min(MAX_SATA_BLOCKS_READ_WRITE, blocks);
+               now_blocks = min((u16)MAX_SATA_BLOCKS_READ_WRITE, blocks);
 
                transfer_size = ATA_SECT_SIZE * now_blocks;
                if (transfer_size > user_buffer_size) {
@@ -755,7 +786,7 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
 
                /* Read/Write from ahci */
                if (ahci_device_data_io(pccb->target, (u8 *) &fis, sizeof(fis),
-                                       user_buffer, user_buffer_size,
+                                       user_buffer, transfer_size,
                                        is_write)) {
                        debug("scsi_ahci: SCSI %s10 command failure.\n",
                              is_write ? "WRITE" : "READ");
@@ -909,7 +940,7 @@ void scsi_low_level_init(int busdevfunc)
 }
 
 #ifdef CONFIG_SCSI_AHCI_PLAT
-int ahci_init(u32 base)
+int ahci_init(void __iomem *base)
 {
        int i, rc = 0;
        u32 linkmap;
@@ -998,12 +1029,11 @@ static int ata_io_flush(u8 port)
 }
 
 
-void scsi_bus_reset(void)
+__weak void scsi_bus_reset(void)
 {
        /*Not implement*/
 }
 
-
 void scsi_print_error(ccb * pccb)
 {
        /*The ahci error info can be read in the ahci driver*/