dt-bindings: pinctrl: stm32: add new entry for package information

[oweals/u-boot.git] / doc / device-tree-bindings / pinctrl / st,stm32-pinctrl.txt

diff --git a/doc/device-tree-bindings/pinctrl/st,stm32-pinctrl.txt b/doc/device-tree-bindings/pinctrl/st,stm32-pinctrl.txt
index c41ae91f7ab0cc228c157edb932a48f4182726e6..00169255e48c5e7b0847615ed0b9cb9c61275796 100644 (file)
--- a/doc/device-tree-bindings/pinctrl/st,stm32-pinctrl.txt
+++ b/doc/device-tree-bindings/pinctrl/st,stm32-pinctrl.txt
@@ -8,8 +8,13 @@ controllers onto these pads.
 Pin controller node:
 Required properies:
  - compatible: value should be one of the following:
-   (a) "st,stm32f429-pinctrl"
-   (b) "st,stm32f746-pinctrl"
+   "st,stm32f429-pinctrl"
+   "st,stm32f469-pinctrl"
+   "st,stm32f746-pinctrl"
+   "st,stm32f769-pinctrl"
+   "st,stm32h743-pinctrl"
+   "st,stm32mp157-pinctrl"
+   "st,stm32mp157-z-pinctrl"
  - #address-cells: The value of this property must be 1
  - #size-cells : The value of this property must be 1
  - ranges      : defines mapping between pin controller node (parent) to
@@ -32,13 +37,30 @@ Required properties:
 
 Optional properties:
  - reset:        : Reference to the reset controller
- - interrupt-parent: phandle of the interrupt parent to which the external
-   GPIO interrupts are forwarded to.
- - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node
-   which includes IRQ mux selection register, and the offset of the IRQ mux
-   selection register.
+ - st,syscfg: Should be phandle/offset/mask.
+       -The phandle to the syscon node which includes IRQ mux selection register.
+       -The offset of the IRQ mux selection register
+       -The field mask of IRQ mux, needed if different of 0xf.
+ - gpio-ranges: Define a dedicated mapping between a pin-controller and
+   a gpio controller. Format is <&phandle a b c> with:
+       -(phandle): phandle of pin-controller.
+       -(a): gpio base offset in range.
+       -(b): pin base offset in range.
+       -(c): gpio count in range
+   This entry has to be used either if there are holes inside a bank:
+       GPIOB0/B1/B2/B14/B15 (see example 2)
+   or if banks are not contiguous:
+       GPIOA/B/C/E...
+   NOTE: If "gpio-ranges" is used for a gpio controller, all gpio-controller
+   have to use a "gpio-ranges" entry.
+   More details in Documentation/devicetree/bindings/gpio/gpio.txt.
+ - st,bank-ioport: should correspond to the EXTI IOport selection (EXTI line
+   used to select GPIOs as interrupts).
+ - hwlocks: reference to a phandle of a hardware spinlock provider node.
+ - st,package: Indicates the SOC package used.
+   More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
 
-Example:
+Example 1:
 #include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
 ...
 
@@ -60,6 +82,43 @@ Example:
                pin-functions nodes follow...
        };
 
+Example 2:
+#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
+...
+
+       pinctrl: pin-controller {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "st,stm32f429-pinctrl";
+               ranges = <0 0x40020000 0x3000>;
+               pins-are-numbered;
+
+               gpioa: gpio@40020000 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       reg = <0x0 0x400>;
+                       resets = <&reset_ahb1 0>;
+                       st,bank-name = "GPIOA";
+                       gpio-ranges = <&pinctrl 0 0 16>;
+               };
+
+               gpiob: gpio@40020400 {
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       reg = <0x0 0x400>;
+                       resets = <&reset_ahb1 0>;
+                       st,bank-name = "GPIOB";
+                       ngpios = 4;
+                       gpio-ranges = <&pinctrl 0 16 3>,
+                                     <&pinctrl 14 30 2>;
+               };
+
+
+               ...
+               pin-functions nodes follow...
+       };
+
+
 Contents of function subnode node:
 ----------------------------------
 Subnode format
@@ -83,14 +142,31 @@ Required properties:
     - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
     - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
     - function: The function number, can be:
-      * 0 : GPIO IN
+      * 0 : GPIO
       * 1 : Alternate Function 0
       * 2 : Alternate Function 1
       * 3 : Alternate Function 2
       * ...
       * 16 : Alternate Function 15
       * 17 : Analog
-      * 18 : GPIO OUT
+
+  To simplify the usage, macro is available to generate "pinmux" field.
+  This macro is available here:
+    - include/dt-bindings/pinctrl/stm32-pinfunc.h
+
+  Some examples of using macro:
+    /* GPIO A9 set as alernate function 2 */
+    ... {
+               pinmux = <STM32_PINMUX('A', 9, AF2)>;
+    };
+    /* GPIO A9 set as GPIO  */
+    ... {
+               pinmux = <STM32_PINMUX('A', 9, GPIO)>;
+    };
+    /* GPIO A9 set as analog */
+    ... {
+               pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
+    };
 
 Optional properties:
 - GENERIC_PINCONFIG: is the generic pinconfig options to use.
@@ -114,13 +190,13 @@ pin-controller {
 ...
        usart1_pins_a: usart1@0 {
                pins1 {
-                       pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
+                       pinmux = <STM32_PINMUX('A', 9, AF7)>;
                        bias-disable;
                        drive-push-pull;
                        slew-rate = <0>;
                };
                pins2 {
-                       pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
+                       pinmux = <STM32_PINMUX('A', 10, AF7)>;
                        bias-disable;
                };
        };
@@ -129,5 +205,4 @@ pin-controller {
 &usart1 {
        pinctrl-0 = <&usart1_pins_a>;
        pinctrl-names = "default";
-       status = "okay";
 };