SPI: Fix 32 bit transfers in mxc_spi.c

[oweals/u-boot.git] / doc / README.ml300

diff --git a/doc/README.ml300 b/doc/README.ml300
index c9ef6e6c81673579d9db1c1daf6c2331fa75d084..27c5b927836e007a471db03fb39ae218481cdd85 100644 (file)
--- a/doc/README.ml300
+++ b/doc/README.ml300
@@ -5,7 +5,7 @@ Xilinx ML300 platform
 ---------------
 
 The Xilinx ML300 board is based on the Virtex-II Pro FPGA with
-integrated IBM PowerPC 405 core. The board is normally booted from
+integrated AMCC PowerPC 405 core. The board is normally booted from
 System ACE CF. U-Boot is then run out of main memory.
 
 An FPGA is a configurable and thus very flexible device. To