sha/asm/sha1-armv4-large.pl: add NEON and ARMv8 code paths.

[oweals/openssl.git] / crypto / sha / asm / sha1-sparcv9a.pl

diff --git a/crypto/sha/asm/sha1-sparcv9a.pl b/crypto/sha/asm/sha1-sparcv9a.pl
index 9e8d0ca3828568ee290d658e63ef8214b9477d8f..e65291bbd9791fe7c990cd45c51c01fa30988dde 100644 (file)
--- a/crypto/sha/asm/sha1-sparcv9a.pl
+++ b/crypto/sha/asm/sha1-sparcv9a.pl
@@ -415,7 +415,7 @@ sha1_block_data_order:
        add     %fp,$bias-256,$base
 
 1:     call    .+8
-       sub     %o7,1b-vis_const,$tmp0
+       add     %o7,vis_const-1b,$tmp0
 
        ldd     [$tmp0+0],$VK_00_19
        ldd     [$tmp0+8],$VK_20_39
@@ -433,7 +433,7 @@ sha1_block_data_order:
        and     $inp,-8,$inp
        ld      [$ctx+16],$Ectx
 
-       # X[16] is maintained in FP register bank
+       ! X[16] is maintained in FP register bank
        alignaddr       %g0,$align,%g0
        ldd             [$inp+0],@X[0]
        sub             $inp,-64,$Xfer
@@ -539,6 +539,7 @@ $code.=<<___;
 .type  sha1_block_data_order,#function
 .size  sha1_block_data_order,(.-sha1_block_data_order)
 .asciz "SHA1 block transform for SPARCv9a, CRYPTOGAMS by <appro\@openssl.org>"
+.align 4
 ___
 
 # Purpose of these subroutines is to explicitly encode VIS instructions,
@@ -548,7 +549,7 @@ ___
 # programmer detect if current CPU is VIS capable at run-time.
 sub unvis {
 my ($mnemonic,$rs1,$rs2,$rd)=@_;
-my $ref,$opf;
+my ($ref,$opf);
 my %visopf = ( "fmul8ulx16"    => 0x037,
                "faligndata"    => 0x048,
                "fpadd32"       => 0x052,