Merge with git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx-merge-sr

[oweals/u-boot.git] / cpu / ppc4xx / tlb.c

diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c
index 8c605591b8103d466ebede3ac46b6c98117ca5bb..50344a491c1603eb1695aa4ff60659517c7e5fa6 100644 (file)
--- a/cpu/ppc4xx/tlb.c
+++ b/cpu/ppc4xx/tlb.c
@@ -37,8 +37,8 @@ typedef struct region {
 } region_t;
 
 static int add_tlb_entry(unsigned long base_addr,
-                         unsigned long tlb_word0_size_value,
-                         unsigned long tlb_word2_i_value)
+                        unsigned long tlb_word0_size_value,
+                        unsigned long tlb_word2_i_value)
 {
        int i;
        unsigned long tlb_word0_value;
@@ -82,7 +82,7 @@ static int add_tlb_entry(unsigned long base_addr,
 }
 
 static void program_tlb_addr(unsigned long base_addr, unsigned long mem_size,
-                             unsigned long tlb_word2_i_value)
+                            unsigned long tlb_word2_i_value)
 {
        int rc;
        int tlb_i;
@@ -166,13 +166,13 @@ static void program_tlb_addr(unsigned long base_addr, unsigned long mem_size,
  * Common usage for boards with SDRAM DIMM modules to dynamically
  * configure the TLB's for the SDRAM
  */
-void program_tlb(u32 start, u32 size)
+void program_tlb(u32 start, u32 size, u32 tlb_word2_i_value)
 {
        region_t region_array;
 
        region_array.base = start;
        region_array.size = size;
-       region_array.tlb_word2_i_value = TLB_WORD2_I_ENABLE;    /* disable cache (for now) */
+       region_array.tlb_word2_i_value = tlb_word2_i_value;     /* en-/disable cache */
 
        /* Call the routine to add in the tlb entries for the memory regions */
        program_tlb_addr(region_array.base, region_array.size,