Merge branch 'denx'

[oweals/u-boot.git] / cpu / ppc4xx / tlb.c

diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c
index 2bfcba19bdbaf500a1d92496b0382eb32c778020..24a9a9cc283f49000716b2513a3589bf5de80cbd 100644 (file)
--- a/cpu/ppc4xx/tlb.c
+++ b/cpu/ppc4xx/tlb.c
@@ -149,7 +149,9 @@ void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value)
                        /*
                         * Now check the end-address if it's in the range
                         */
-                       if ((tlb_vaddr + tlb_size - 1) <= (vaddr + size - 1)) {
+                       if (((tlb_vaddr + tlb_size - 1) <= (vaddr + size - 1)) ||
+                           ((tlb_vaddr < (vaddr + size - 1)) &&
+                            ((tlb_vaddr + tlb_size - 1) > (vaddr + size - 1)))) {
                                /*
                                 * Found a TLB in the range.
                                 * Change cache attribute in tlb2 word.
@@ -314,12 +316,12 @@ static void program_tlb_addr(u64 phys_addr,
                                virt_addr += TLB_1KB_SIZE;
                        }
                } else {
-                       printf("ERROR: no TLB size exists for the base address 0x%0X.\n",
+                       printf("ERROR: no TLB size exists for the base address 0x%llx.\n",
                                phys_addr);
                }
 
                if (rc != 0)
-                       printf("ERROR: no TLB entries available for the base addr 0x%0X.\n",
+                       printf("ERROR: no TLB entries available for the base addr 0x%llx.\n",
                                phys_addr);
        }