Fix PCI-Express on PPC440SPe rev. A.
[oweals/u-boot.git] / cpu / ppc4xx / 405gp_pci.c
index 0ccb3d81c6af15131c81e5be1325366735f4c706..0b0686bcf716e8eb2136e52489dab41dc02d22fd 100644 (file)
@@ -315,7 +315,6 @@ void pci_405gp_init(struct pci_controller *hose)
 #ifdef CONFIG_PCI_SCAN_SHOW
                printf("PCI:   Bus Dev VenId DevId Class Int\n");
 #endif
-
                hose->last_busno = pci_hose_scan(hose);
        }
 #endif  /* CONFIG_PCI_PNP */
@@ -465,17 +464,30 @@ void pci_440_init (struct pci_controller *hose)
        hose->first_busno = 0;
        hose->last_busno = 0xff;
 
+       /* PCI I/O space */
        pci_set_region(hose->regions + reg_num++,
                       0x00000000,
                       PCIX0_IOBASE,
                       0x10000,
                       PCI_REGION_IO);
 
+       /* PCI memory space */
        pci_set_region(hose->regions + reg_num++,
                       CFG_PCI_TARGBASE,
                       CFG_PCI_MEMBASE,
                       0x10000000,
                       PCI_REGION_MEM );
+
+#if defined(CONFIG_PCI_SYS_MEM_BUS) && defined(CONFIG_PCI_SYS_MEM_PHYS) && \
+       defined(CONFIG_PCI_SYS_MEM_SIZE)
+       /* System memory space */
+       pci_set_region(hose->regions + reg_num++,
+                      CONFIG_PCI_SYS_MEM_BUS,
+                      CONFIG_PCI_SYS_MEM_PHYS,
+                      CONFIG_PCI_SYS_MEM_SIZE,
+                      PCI_REGION_MEM | PCI_REGION_MEMORY );
+#endif
+
        hose->region_count = reg_num;
 
        pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);
@@ -550,10 +562,12 @@ void pci_440_init (struct pci_controller *hose)
        }
 }
 
-
 void pci_init_board(void)
 {
        pci_440_init (&ppc440_hose);
+#if defined(CONFIG_440SPE)
+       pcie_setup_hoses();
+#endif
 }
 
 #endif /* CONFIG_440 & CONFIG_PCI */