mips: Move cpu/mips/* to arch/mips/cpu/*

[oweals/u-boot.git] / cpu / nios / start.S

diff --git a/cpu/nios/start.S b/cpu/nios/start.S
index cb1af3c8b607f816092616237027ce1cc42fac66..3578a04d51e88d01b4d059edb2a63bd12a878b2c 100644 (file)
--- a/cpu/nios/start.S
+++ b/cpu/nios/start.S
@@ -23,6 +23,7 @@
 
 
 #include <config.h>
+#include <timestamp.h>
 #include <version.h>
 
 #if !defined(CONFIG_IDENT_STRING)
@@ -71,10 +72,10 @@ _start:
        /*
         * STACK
         */
-       pfx     %hi(CFG_INIT_SP)
-       movi    %sp, %lo(CFG_INIT_SP)
-       pfx     %xhi(CFG_INIT_SP)
-       movhi   %sp, %xlo(CFG_INIT_SP)
+       pfx     %hi(CONFIG_SYS_INIT_SP)
+       movi    %sp, %lo(CONFIG_SYS_INIT_SP)
+       pfx     %xhi(CONFIG_SYS_INIT_SP)
+       movhi   %sp, %xlo(CONFIG_SYS_INIT_SP)
        mov     %fp, %sp
 
        pfx     %hi(4*16)
@@ -152,10 +153,10 @@ reloc:
        /*
         * INIT VECTOR TABLE
         */
-       pfx     %hi(CFG_VECT_BASE)
-       movi    %g0, %lo(CFG_VECT_BASE)
-       pfx     %xhi(CFG_VECT_BASE)
-       movhi   %g0, %xlo(CFG_VECT_BASE)        /* dst */
+       pfx     %hi(CONFIG_SYS_VECT_BASE)
+       movi    %g0, %lo(CONFIG_SYS_VECT_BASE)
+       pfx     %xhi(CONFIG_SYS_VECT_BASE)
+       movhi   %g0, %xlo(CONFIG_SYS_VECT_BASE) /* dst */
        mov     %l0, %g0
 
        pfx     %hi(_vectors)
@@ -208,7 +209,7 @@ __start:
  * A control register that counts system clock cycles would be
  * a handy feature -- hint for Altera ;-)
  */
-       .globl dly_clks
+       .globl dly_clks
        /* Each loop is 4 instructions as delay slot is always
         * executed. Each instruction is approximately 4 clocks
         * (according to some lame info from Altera). So ...
@@ -233,5 +234,5 @@ dly_clks:
 
 version_string:
        .ascii U_BOOT_VERSION
-       .ascii " (", __DATE__, " - ", __TIME__, ")"
+       .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
        .ascii CONFIG_IDENT_STRING, "\0"