#include <common.h>
#include <commproc.h>
#include <command.h>
+#include <serial.h>
#include <watchdog.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#if !defined(CONFIG_8xx_CONS_NONE) /* No Console at all */
#if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */
#define SMC_INDEX 0
-#undef SCC_INDEX
#define PROFF_SMC PROFF_SMC1
#define CPM_CR_CH_SMC CPM_CR_CH_SMC1
#elif defined(CONFIG_8xx_CONS_SMC2) /* Console on SMC2 */
#define SMC_INDEX 1
-#undef SCC_INDEX
#define PROFF_SMC PROFF_SMC2
#define CPM_CR_CH_SMC CPM_CR_CH_SMC2
-#elif defined(CONFIG_8xx_CONS_SCC1) /* Console on SCC1 */
-#undef SMC_INDEX
+#endif /* CONFIG_8xx_CONS_SMCx */
+
+#if defined(CONFIG_8xx_CONS_SCC1) /* Console on SCC1 */
#define SCC_INDEX 0
#define PROFF_SCC PROFF_SCC1
#define CPM_CR_CH_SCC CPM_CR_CH_SCC1
#elif defined(CONFIG_8xx_CONS_SCC2) /* Console on SCC2 */
-#undef SMC_INDEX
#define SCC_INDEX 1
#define PROFF_SCC PROFF_SCC2
#define CPM_CR_CH_SCC CPM_CR_CH_SCC2
#elif defined(CONFIG_8xx_CONS_SCC3) /* Console on SCC3 */
-#undef SMC_INDEX
#define SCC_INDEX 2
#define PROFF_SCC PROFF_SCC3
#define CPM_CR_CH_SCC CPM_CR_CH_SCC3
#elif defined(CONFIG_8xx_CONS_SCC4) /* Console on SCC4 */
-#undef SMC_INDEX
#define SCC_INDEX 3
#define PROFF_SCC PROFF_SCC4
#define CPM_CR_CH_SCC CPM_CR_CH_SCC4
-#else /* CONFIG_8xx_CONS_? */
-#error "console not correctly defined"
-#endif
+#endif /* CONFIG_8xx_CONS_SCCx */
static void serial_setdivisor(volatile cpm8xx_t *cp)
{
- DECLARE_GLOBAL_DATA_PTR;
- int divisor=gd->cpu_clk/16/gd->baudrate;
+ int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate;
if(divisor/16>0x1000) {
- /* bad divisor, assume 50Mhz clock and 9600 baud */
- divisor=(50*1000*1000)/16/9600;
+ /* bad divisor, assume 50MHz clock and 9600 baud */
+ divisor=(50*1000*1000 + 8*9600)/16/9600;
}
+#ifdef CONFIG_SYS_BRGCLK_PRESCALE
+ divisor /= CONFIG_SYS_BRGCLK_PRESCALE;
+#endif
+
if(divisor<=0x1000) {
cp->cp_brgc1=((divisor-1)<<1) | CPM_BRG_EN;
} else {
* as serial console interface.
*/
-int serial_init (void)
+static void smc_setbrg (void)
{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ volatile cpm8xx_t *cp = &(im->im_cpm);
+
+ /* Set up the baud rate generator.
+ * See 8xx_io/commproc.c for details.
+ *
+ * Wire BRG1 to SMCx
+ */
+
+ cp->cp_simode = 0x00000000;
+
+ serial_setdivisor(cp);
+}
+
+static int smc_init (void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile smc_t *sp;
volatile smc_uart_t *up;
volatile cbd_t *tbdf, *rbdf;
sp = (smc_t *) &(cp->cp_smc[SMC_INDEX]);
up = (smc_uart_t *) &cp->cp_dparam[PROFF_SMC];
+#ifdef CONFIG_SYS_SMC_UCODE_PATCH
+ up = (smc_uart_t *) &cp->cp_dpmem[up->smc_rpbase];
+#else
+ /* Disable relocation */
+ up->smc_rpbase = 0;
+#endif
/* Disable transmitter/receiver.
*/
im->im_siu_conf.sc_sdcr = 1;
/* clear error conditions */
-#ifdef CFG_SDSR
- im->im_sdma.sdma_sdsr = CFG_SDSR;
+#ifdef CONFIG_SYS_SDSR
+ im->im_sdma.sdma_sdsr = CONFIG_SYS_SDSR;
#else
im->im_sdma.sdma_sdsr = 0x83;
#endif
/* clear SDMA interrupt mask */
-#ifdef CFG_SDMR
- im->im_sdma.sdma_sdmr = CFG_SDMR;
+#ifdef CONFIG_SYS_SDMR
+ im->im_sdma.sdma_sdmr = CONFIG_SYS_SDMR;
#else
im->im_sdma.sdma_sdmr = 0x00;
#endif
* the buffer descriptors.
*/
-#ifdef CFG_ALLOC_DPRAM
+#ifdef CONFIG_SYS_ALLOC_DPRAM
dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ;
#else
dpaddr = CPM_SERIAL_BASE ;
up->smc_tbase = dpaddr+sizeof(cbd_t);
up->smc_rfcr = SMC_EB;
up->smc_tfcr = SMC_EB;
+#if defined (CONFIG_SYS_SMC_UCODE_PATCH)
+ up->smc_rbptr = up->smc_rbase;
+ up->smc_tbptr = up->smc_tbase;
+ up->smc_rstate = 0;
+ up->smc_tstate = 0;
+#endif
#if defined(CONFIG_MBX)
board_serial_init();
sp->smc_smcm = 0;
sp->smc_smce = 0xff;
- /* Set up the baud rate generator.
- */
- serial_setbrg ();
+#ifdef CONFIG_SYS_SPC1920_SMC1_CLK4
+ /* clock source is PLD */
+
+ /* set freq to 19200 Baud */
+ *((volatile uchar *) CONFIG_SYS_SPC1920_PLD_BASE+6) = 0x3;
+ /* configure clk4 as input */
+ im->im_ioport.iop_pdpar |= 0x800;
+ im->im_ioport.iop_pddir &= ~0x800;
+
+ cp->cp_simode = ((cp->cp_simode & ~0xf000) | 0x7000);
+#else
+ /* Set up the baud rate generator */
+ smc_setbrg ();
+#endif
/* Make the first buffer the only buffer.
*/
return (0);
}
-void
-serial_setbrg (void)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile cpm8xx_t *cp = &(im->im_cpm);
-
- /* Set up the baud rate generator.
- * See 8xx_io/commproc.c for details.
- *
- * Wire BRG1 to SMCx
- */
-
- cp->cp_simode = 0x00000000;
-
- serial_setdivisor(cp);
-}
-
-#ifdef CONFIG_MODEM_SUPPORT
-void disable_putc(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- gd->be_quiet = 1;
-}
-
-void enable_putc(void)
-{
- DECLARE_GLOBAL_DATA_PTR;
- gd->be_quiet = 0;
-}
-#endif
-
-void
-serial_putc(const char c)
+static void
+smc_putc(const char c)
{
volatile cbd_t *tbdf;
volatile char *buf;
volatile smc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
#ifdef CONFIG_MODEM_SUPPORT
- DECLARE_GLOBAL_DATA_PTR;
-
if (gd->be_quiet)
return;
#endif
if (c == '\n')
- serial_putc ('\r');
+ smc_putc ('\r');
up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
+#ifdef CONFIG_SYS_SMC_UCODE_PATCH
+ up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
+#endif
tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
}
}
-int
-serial_getc(void)
+static void
+smc_puts (const char *s)
+{
+ while (*s) {
+ smc_putc (*s++);
+ }
+}
+
+static int
+smc_getc(void)
{
volatile cbd_t *rbdf;
volatile unsigned char *buf;
volatile smc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
unsigned char c;
up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
+#ifdef CONFIG_SYS_SMC_UCODE_PATCH
+ up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
+#endif
rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
return(c);
}
-int
-serial_tstc()
+static int
+smc_tstc(void)
{
volatile cbd_t *rbdf;
volatile smc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
+#ifdef CONFIG_SYS_SMC_UCODE_PATCH
+ up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
+#endif
rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
return(!(rbdf->cbd_sc & BD_SC_EMPTY));
}
-#else /* ! CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2 */
+struct serial_device serial_smc_device =
+{
+ "serial_smc",
+ "SMC",
+ smc_init,
+ smc_setbrg,
+ smc_getc,
+ smc_tstc,
+ smc_putc,
+ smc_puts,
+};
+
+#endif /* CONFIG_8xx_CONS_SMC1 || CONFIG_8xx_CONS_SMC2 */
+
+#if defined(CONFIG_8xx_CONS_SCC1) || defined(CONFIG_8xx_CONS_SCC2) || \
+ defined(CONFIG_8xx_CONS_SCC3) || defined(CONFIG_8xx_CONS_SCC4)
+
+static void
+scc_setbrg (void)
+{
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ volatile cpm8xx_t *cp = &(im->im_cpm);
-int serial_init (void)
+ /* Set up the baud rate generator.
+ * See 8xx_io/commproc.c for details.
+ *
+ * Wire BRG1 to SCCx
+ */
+
+ cp->cp_sicr &= ~(0x000000FF << (8 * SCC_INDEX));
+
+ serial_setdivisor(cp);
+}
+
+static int scc_init (void)
{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile scc_t *sp;
volatile scc_uart_t *up;
volatile cbd_t *tbdf, *rbdf;
/* Allocate space for two buffer descriptors in the DP ram.
*/
-#ifdef CFG_ALLOC_DPRAM
+#ifdef CONFIG_SYS_ALLOC_DPRAM
dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ;
#else
- dpaddr = CPM_SERIAL_BASE ;
+ dpaddr = CPM_SERIAL2_BASE ;
#endif
/* Enable SDMA.
/* Set up the baud rate generator.
*/
- serial_setbrg ();
+ scc_setbrg ();
/* Set up the uart parameters in the parameter ram.
*/
/* Set UART mode, clock divider 16 on Tx and Rx
*/
+ sp->scc_gsmrl &= ~0xF;
sp->scc_gsmrl |=
(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
+ sp->scc_psmr = 0;
sp->scc_psmr |= SCU_PSMR_CL;
/* Mask all interrupts and remove anything pending.
return (0);
}
-void
-serial_setbrg (void)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- volatile cpm8xx_t *cp = &(im->im_cpm);
-
- /* Set up the baud rate generator.
- * See 8xx_io/commproc.c for details.
- *
- * Wire BRG1 to SCCx
- */
-
- cp->cp_sicr &= ~(0x000000FF << (8 * SCC_INDEX));
-
- serial_setdivisor(cp);
-}
-
-void
-serial_putc(const char c)
+static void
+scc_putc(const char c)
{
volatile cbd_t *tbdf;
volatile char *buf;
volatile scc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
+#ifdef CONFIG_MODEM_SUPPORT
+ if (gd->be_quiet)
+ return;
+#endif
+
if (c == '\n')
- serial_putc ('\r');
+ scc_putc ('\r');
up = (scc_uart_t *)&cpmp->cp_dparam[PROFF_SCC];
}
}
-int
-serial_getc(void)
+static void
+scc_puts (const char *s)
+{
+ while (*s) {
+ scc_putc (*s++);
+ }
+}
+
+static int
+scc_getc(void)
{
volatile cbd_t *rbdf;
volatile unsigned char *buf;
volatile scc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
unsigned char c;
return(c);
}
-int
-serial_tstc()
+static int
+scc_tstc(void)
{
volatile cbd_t *rbdf;
volatile scc_uart_t *up;
- volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
up = (scc_uart_t *)&cpmp->cp_dparam[PROFF_SCC];
return(!(rbdf->cbd_sc & BD_SC_EMPTY));
}
-#endif /* CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2 */
-
+struct serial_device serial_scc_device =
+{
+ "serial_scc",
+ "SCC",
+ scc_init,
+ scc_setbrg,
+ scc_getc,
+ scc_tstc,
+ scc_putc,
+ scc_puts,
+};
+
+#endif /* CONFIG_8xx_CONS_SCCx */
-void
-serial_puts (const char *s)
+#ifdef CONFIG_MODEM_SUPPORT
+void disable_putc(void)
{
- while (*s) {
- serial_putc (*s++);
- }
+ gd->be_quiet = 1;
}
+void enable_putc(void)
+{
+ gd->be_quiet = 0;
+}
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void
kgdb_serial_init(void)
{
+ int i = -1;
+
+ if (strcmp(default_serial_console()->ctlr, "SMC") == 0)
+ {
#if defined(CONFIG_8xx_CONS_SMC1)
- serial_printf("[on SMC1] ");
+ i = 1;
#elif defined(CONFIG_8xx_CONS_SMC2)
- serial_printf("[on SMC2] ");
-#elif defined(CONFIG_8xx_CONS_SCC1)
- serial_printf("[on SCC1] ");
+ i = 2;
+#endif
+ }
+ else if (strcmp(default_serial_console()->ctlr, "SMC") == 0)
+ {
+#if defined(CONFIG_8xx_CONS_SCC1)
+ i = 1;
#elif defined(CONFIG_8xx_CONS_SCC2)
- serial_printf("[on SCC2] ");
+ i = 2;
#elif defined(CONFIG_8xx_CONS_SCC3)
- serial_printf("[on SCC3] ");
+ i = 3;
#elif defined(CONFIG_8xx_CONS_SCC4)
- serial_printf("[on SCC4] ");
+ i = 4;
#endif
+ }
+
+ if (i >= 0)
+ {
+ serial_printf("[on %s%d] ", default_serial_console()->ctlr, i);
+ }
}
void
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
#endif /* CONFIG_8xx_CONS_NONE */
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