mr r1, r3 /* Set new stack pointer */
mr r9, r4 /* Save copy of Global Data pointer */
+ mr r29, r9 /* Save for DECLARE_GLOBAL_DATA_PTR */
mr r10, r5 /* Save copy of Destination Address */
-
+
mr r3, r5 /* Destination Address */
lis r4, CFG_MONITOR_BASE@h /* Source Address */
ori r4, r4, CFG_MONITOR_BASE@l
sync
#endif
- /* setup the bats */
- bl setup_bats
- sync
- /* enable address translation */
- bl enable_addr_trans
- sync
-
/* enable and invalidate the data cache */
bl dcache_enable
sync
bl icache_enable
sync
- /* Set up MSR and HID0, HID1*/
- /* Enable interrupts */
-/* mfmsr r28
- li r4,0
- ori r4,r4,MSR_EE
- or r28,r28,r4
- mtmsr r28
- */
/* TBEN in HID0 */
mfspr r4, HID0