Merge commit 'u-boot/master' into for-1.3.1

[oweals/u-boot.git] / cpu / mpc86xx / spd_sdram.c

diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c
index 059097f5142ae595d51b6cd105b1180c43195c85..265e033fb3dca0c3d30ecfac1bbd6b55c566c20e 100644 (file)
--- a/cpu/mpc86xx/spd_sdram.c
+++ b/cpu/mpc86xx/spd_sdram.c
@@ -1114,8 +1114,10 @@ spd_sdram(void)
        int memsize_ddr1 = 0;
        unsigned int law_size_ddr1;
        volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
        volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
+#ifdef CONFIG_DDR_INTERLEAVE
+       volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
+#endif
 
 #if (CONFIG_NUM_DDR_CONTROLLERS > 1)
        int memsize_ddr2_dimm1 = 0;
@@ -1270,10 +1272,12 @@ spd_sdram(void)
                debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8);
                debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8);
        }
+
+       debug("\nMemory size of DDR2 = 0x%08lx\n", memsize_ddr2);
+
 #endif /* CONFIG_NUM_DDR_CONTROLLERS > 1 */
 
-       debug("\nMemory sizes are DDR1 = 0x%08lx, DDR2 = 0x%08lx\n",
-             memsize_ddr1, memsize_ddr2);
+       debug("\nMemory size of DDR1 = 0x%08lx\n", memsize_ddr1);
 
        /*
         * If neither DDR controller is enabled return 0.