Merge branch 'master' of /home/wd/git/u-boot/custodians

[oweals/u-boot.git] / cpu / mpc86xx / cpu.c

diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index ecea5b0643896211960c4821ab9e11acae94f5c5..dc53bee588d46dc10a9fa3f51f4602666e347f7c 100644 (file)
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -28,6 +28,7 @@
 #include <asm/cache.h>
 #include <asm/mmu.h>
 #include <mpc86xx.h>
+#include <tsec.h>
 #include <asm/fsl_law.h>
 
 
@@ -38,9 +39,7 @@ checkcpu(void)
        uint pvr, svr;
        uint ver;
        uint major, minor;
-       uint lcrr;              /* local bus clock ratio register */
-       uint clkdiv;            /* clock divider portion of lcrr */
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile ccsr_gur_t *gur = &immap->im_gur;
 
        puts("Freescale PowerPC\n");
@@ -99,22 +98,11 @@ checkcpu(void)
        printf("MPX:%4lu MHz, ", sysinfo.freqSystemBus / 1000000);
        printf("DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000);
 
-#if defined(CFG_LBC_LCRR)
-       lcrr = CFG_LBC_LCRR;
-#else
-       {
-               volatile immap_t *immap = (immap_t *) CFG_IMMR;
-               volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-
-               lcrr = lbc->lcrr;
-       }
-#endif
-       clkdiv = lcrr & 0x0f;
-       if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) {
-               printf("LBC:%4lu MHz\n",
-                      sysinfo.freqSystemBus / 1000000 / clkdiv);
+       if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
+               printf("LBC:%4lu MHz\n", sysinfo.freqLocalBus / 1000000);
        } else {
-               printf("    LBC: unknown (lcrr: 0x%08x)\n", lcrr);
+               printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
+                      sysinfo.freqLocalBus);
        }
 
        puts("    L2: ");
@@ -160,16 +148,16 @@ do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 #if !defined(CONFIG_MPC8641HPCN) && !defined(CONFIG_MPC8610HPCD)
 
-#ifdef CFG_RESET_ADDRESS
-       ulong addr = CFG_RESET_ADDRESS;
+#ifdef CONFIG_SYS_RESET_ADDRESS
+       ulong addr = CONFIG_SYS_RESET_ADDRESS;
 #else
        /*
-        * note: when CFG_MONITOR_BASE points to a RAM address,
-        * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid
+        * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address,
+        * CONFIG_SYS_MONITOR_BASE - sizeof (ulong) is usually a valid
         * address. Better pick an address known to be invalid on your
-        * system and assign it to CFG_RESET_ADDRESS.
+        * system and assign it to CONFIG_SYS_RESET_ADDRESS.
         */
-       ulong addr = CFG_MONITOR_BASE - sizeof(ulong);
+       ulong addr = CONFIG_SYS_MONITOR_BASE - sizeof(ulong);
 #endif
 
        /* flush and disable I/D cache */
@@ -218,7 +206,7 @@ watchdog_reset(void)
        /*
         * This actually feed the hard enabled watchdog.
         */
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
+       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
        volatile ccsr_wdt_t *wdt = &immap->im_wdt;
        volatile ccsr_gur_t *gur = &immap->im_gur;
        u32 tmp = gur->pordevsr;
@@ -236,7 +224,7 @@ watchdog_reset(void)
 void
 dma_init(void)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile ccsr_dma_t *dma = &immap->im_dma;
 
        dma->satr0 = 0x00040000;
@@ -247,7 +235,7 @@ dma_init(void)
 uint
 dma_check(void)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile ccsr_dma_t *dma = &immap->im_dma;
        volatile uint status = dma->sr0;
 
@@ -265,7 +253,7 @@ dma_check(void)
 int
 dma_xfer(void *dest, uint count, void *src)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile ccsr_dma_t *dma = &immap->im_dma;
 
        dma->dar0 = (uint) dest;
@@ -287,7 +275,7 @@ dma_xfer(void *dest, uint count, void *src)
  */
 void mpc86xx_reginfo(void)
 {
-       immap_t *immap = (immap_t *)CFG_IMMR;
+       immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
        ccsr_lbc_t *lbc = &immap->im_lbc;
 
        print_bats();
@@ -305,28 +293,15 @@ void mpc86xx_reginfo(void)
 
 }
 
-#ifdef CONFIG_TSEC_ENET
-/* Default initializations for TSEC controllers.  To override,
- * create a board-specific function called:
- *     int board_eth_init(bd_t *bis)
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
  */
-
-extern int tsec_initialize(bd_t * bis, int index, char *devname);
-
 int cpu_eth_init(bd_t *bis)
 {
-#if defined(CONFIG_TSEC1)
-       tsec_initialize(bis, 0, CONFIG_TSEC1_NAME);
-#endif
-#if defined(CONFIG_TSEC2)
-       tsec_initialize(bis, 1, CONFIG_TSEC2_NAME);
-#endif
-#if defined(CONFIG_TSEC3)
-       tsec_initialize(bis, 2, CONFIG_TSEC3_NAME);
-#endif
-#if defined(CONFIG_TSEC4)
-       tsec_initialize(bis, 3, CONFIG_TSEC4_NAME);
+#if defined(CONFIG_TSEC_ENET)
+       tsec_standard_init(bis);
 #endif
+
        return 0;
 }
-#endif /* CONFIG_TSEC_ENET */