OMAP3: Fix timer handling to 1ms and CONFIG_SYS_HZ to 1000

[oweals/u-boot.git] / cpu / mpc85xx / mp.c

diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
index e733f7b00a50459f6c50e690fbea6ff9bb2e7038..76f02a4917ff289c014408acde62f2dd34a30456 100644 (file)
--- a/cpu/mpc85xx/mp.c
+++ b/cpu/mpc85xx/mp.c
@@ -36,8 +36,9 @@ u32 get_my_id()
 
 int cpu_reset(int nr)
 {
-       volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
+       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
        out_be32(&pic->pir, 1 << nr);
+       /* the dummy read works around an errata on early 85xx MP PICs */
        (void)in_be32(&pic->pir);
        out_be32(&pic->pir, 0x0);
 
@@ -50,12 +51,12 @@ int cpu_status(int nr)
 
        if (nr == id) {
                table = (u32 *)get_spin_addr();
-               printf("table base @ 0x%08x\n", table);
+               printf("table base @ 0x%p\n", table);
        } else {
                table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;
                printf("Running on cpu %d\n", id);
                printf("\n");
-               printf("table @ 0x%08x:\n", table);
+               printf("table @ 0x%p\n", table);
                printf("   addr - 0x%08x\n", table[BOOT_ENTRY_ADDR_LOWER]);
                printf("   pir  - 0x%08x\n", table[BOOT_ENTRY_PIR]);
                printf("   r3   - 0x%08x\n", table[BOOT_ENTRY_R3_LOWER]);
@@ -87,7 +88,7 @@ int cpu_release(int nr, int argc, char *argv[])
                return 1;
        }
 
-#ifdef CFG_64BIT_STRTOUL
+#ifdef CONFIG_SYS_64BIT_STRTOUL
        boot_addr = simple_strtoull(argv[0], NULL, 16);
 #else
        boot_addr = simple_strtoul(argv[0], NULL, 16);
@@ -103,11 +104,24 @@ int cpu_release(int nr, int argc, char *argv[])
        }
 
        table[BOOT_ENTRY_ADDR_UPPER] = (u32)(boot_addr >> 32);
+
+       /* ensure all table updates complete before final address write */
+       eieio();
+
        table[BOOT_ENTRY_ADDR_LOWER] = (u32)(boot_addr & 0xffffffff);
 
        return 0;
 }
 
+u32 determine_mp_bootpg(void)
+{
+       /* if we have 4G or more of memory, put the boot page at 4Gb-4k */
+       if ((u64)gd->ram_size > 0xfffff000)
+               return (0xfffff000);
+
+       return (gd->ram_size - 4096);
+}
+
 ulong get_spin_addr(void)
 {
        extern ulong __secondary_start_page;
@@ -125,9 +139,9 @@ static void pq3_mp_up(unsigned long bootpg)
        u32 up, cpu_up_mask, whoami;
        u32 *table = (u32 *)get_spin_addr();
        volatile u32 bpcr;
-       volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
-       volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
+       volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
+       volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+       volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
        u32 devdisr;
        int timeout = 10;
 
@@ -143,7 +157,7 @@ static void pq3_mp_up(unsigned long bootpg)
        out_be32(&gur->devdisr, devdisr);
 
        /* release the hounds */
-       up = ((1 << CONFIG_NR_CPUS) - 1);
+       up = ((1 << CONFIG_NUM_CPUS) - 1);
        bpcr = in_be32(&ecm->eebpcr);
        bpcr |= (up << 24);
        out_be32(&ecm->eebpcr, bpcr);
@@ -153,7 +167,7 @@ static void pq3_mp_up(unsigned long bootpg)
        /* wait for everyone */
        while (timeout) {
                int i;
-               for (i = 1; i < CONFIG_NR_CPUS; i++) {
+               for (i = 0; i < CONFIG_NUM_CPUS; i++) {
                        if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
                                cpu_up_mask |= (1 << i);
                };
@@ -184,13 +198,7 @@ static void pq3_mp_up(unsigned long bootpg)
 
 void cpu_mp_lmb_reserve(struct lmb *lmb)
 {
-       u32 bootpg;
-
-       /* if we have 4G or more of memory, put the boot page at 4Gb-4k */
-       if ((u64)gd->ram_size > 0xfffff000)
-               bootpg = 0xfffff000;
-       else
-               bootpg = gd->ram_size - 4096;
+       u32 bootpg = determine_mp_bootpg();
 
        lmb_reserve(lmb, bootpg, 4096);
 }
@@ -199,13 +207,7 @@ void setup_mp(void)
 {
        extern ulong __secondary_start_page;
        ulong fixup = (ulong)&__secondary_start_page;
-       u32 bootpg;
-
-       /* if we have 4G or more of memory, put the boot page at 4Gb-4k */
-       if ((u64)gd->ram_size > 0xfffff000)
-               bootpg = 0xfffff000;
-       else
-               bootpg = gd->ram_size - 4096;
+       u32 bootpg = determine_mp_bootpg();
 
        memcpy((void *)bootpg, (void *)fixup, 4096);
        flush_cache(bootpg, 4096);