#include <common.h>
#include <asm/processor.h>
#include <ioports.h>
+#include <lmb.h>
#include <asm/io.h>
#include "mp.h"
DECLARE_GLOBAL_DATA_PTR;
-#define BOOT_ENTRY_ADDR 0
-#define BOOT_ENTRY_PIR 1
-#define BOOT_ENTRY_R3 2
-#define BOOT_ENTRY_R4 3
-#define BOOT_ENTRY_R6 4
-#define BOOT_ENTRY_R7 5
-#define NUM_BOOT_ENTRY 6
-
u32 get_my_id()
{
return mfspr(SPRN_PIR);
if (nr == id) {
table = (u32 *)get_spin_addr();
- printf("table base @ 0x%08x\n", table);
+ printf("table base @ 0x%p\n", table);
} else {
table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;
printf("Running on cpu %d\n", id);
printf("\n");
- printf("table @ 0x%08x:\n", table);
- printf(" addr - 0x%08x\n", table[BOOT_ENTRY_ADDR]);
+ printf("table @ 0x%p\n", table);
+ printf(" addr - 0x%08x\n", table[BOOT_ENTRY_ADDR_LOWER]);
printf(" pir - 0x%08x\n", table[BOOT_ENTRY_PIR]);
- printf(" r3 - 0x%08x\n", table[BOOT_ENTRY_R3]);
- printf(" r4 - 0x%08x\n", table[BOOT_ENTRY_R4]);
- printf(" r6 - 0x%08x\n", table[BOOT_ENTRY_R6]);
- printf(" r7 - 0x%08x\n", table[BOOT_ENTRY_R7]);
+ printf(" r3 - 0x%08x\n", table[BOOT_ENTRY_R3_LOWER]);
+ printf(" r6 - 0x%08x\n", table[BOOT_ENTRY_R6_LOWER]);
}
return 0;
}
-int cpu_release(int nr, unsigned long boot_addr, int argc, char *argv[])
+static u8 boot_entry_map[4] = {
+ 0,
+ BOOT_ENTRY_PIR,
+ BOOT_ENTRY_R3_LOWER,
+ BOOT_ENTRY_R6_LOWER,
+};
+
+int cpu_release(int nr, int argc, char *argv[])
{
u32 i, val, *table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;
+ u64 boot_addr;
if (nr == get_my_id()) {
printf("Invalid to release the boot core.\n\n");
return 1;
}
- if (argc != 5) {
+ if (argc != 4) {
printf("Invalid number of arguments to release.\n\n");
return 1;
}
- /* handle pir, r3, r4, r6, r7 */
- for (i = 0; i < 5; i++) {
+#ifdef CFG_64BIT_STRTOUL
+ boot_addr = simple_strtoull(argv[0], NULL, 16);
+#else
+ boot_addr = simple_strtoul(argv[0], NULL, 16);
+#endif
+
+ /* handle pir, r3, r6 */
+ for (i = 1; i < 4; i++) {
if (argv[i][0] != '-') {
+ u8 entry = boot_entry_map[i];
val = simple_strtoul(argv[i], NULL, 16);
- table[i+BOOT_ENTRY_PIR] = val;
+ table[entry] = val;
}
}
- table[BOOT_ENTRY_ADDR] = boot_addr;
+ table[BOOT_ENTRY_ADDR_UPPER] = (u32)(boot_addr >> 32);
+
+ /* ensure all table updates complete before final address write */
+ eieio();
+
+ table[BOOT_ENTRY_ADDR_LOWER] = (u32)(boot_addr & 0xffffffff);
return 0;
}
out_be32(&gur->devdisr, devdisr);
/* release the hounds */
- up = ((1 << CONFIG_NR_CPUS) - 1);
+ up = ((1 << CONFIG_NUM_CPUS) - 1);
bpcr = in_be32(&ecm->eebpcr);
bpcr |= (up << 24);
out_be32(&ecm->eebpcr, bpcr);
/* wait for everyone */
while (timeout) {
int i;
- for (i = 1; i < CONFIG_NR_CPUS; i++) {
- if (table[i * NUM_BOOT_ENTRY])
+ for (i = 0; i < CONFIG_NUM_CPUS; i++) {
+ if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
cpu_up_mask |= (1 << i);
};
timeout--;
}
+ if (timeout == 0)
+ printf("CPU up timeout. CPU up mask is %x should be %x\n",
+ cpu_up_mask, up);
+
/* enable time base at the platform */
if (whoami)
devdisr |= MPC85xx_DEVDISR_TB1;
out_be32(&gur->devdisr, devdisr);
}
+void cpu_mp_lmb_reserve(struct lmb *lmb)
+{
+ u32 bootpg;
+
+ /* if we have 4G or more of memory, put the boot page at 4Gb-4k */
+ if ((u64)gd->ram_size > 0xfffff000)
+ bootpg = 0xfffff000;
+ else
+ bootpg = gd->ram_size - 4096;
+
+ lmb_reserve(lmb, bootpg, 4096);
+}
+
void setup_mp(void)
{
extern ulong __secondary_start_page;