OMAP3: Fix timer handling to 1ms and CONFIG_SYS_HZ to 1000

[oweals/u-boot.git] / cpu / mpc85xx / cpu.c

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 2ed44bf2ad790ec9abc5d9a48658a696930ed066..ef976a43fe8c013d2cdd25d73c7508d27a5212db 100644 (file)
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -31,6 +31,7 @@
 #include <command.h>
 #include <tsec.h>
 #include <netdev.h>
+#include <fsl_esdhc.h>
 #include <asm/cache.h>
 #include <asm/io.h>
 
@@ -60,8 +61,12 @@ struct cpu_type cpu_type_list [] = {
        CPU_TYPE_ENTRY(8567, 8567_E),
        CPU_TYPE_ENTRY(8568, 8568),
        CPU_TYPE_ENTRY(8568, 8568_E),
+       CPU_TYPE_ENTRY(8569, 8569),
+       CPU_TYPE_ENTRY(8569, 8569_E),
        CPU_TYPE_ENTRY(8572, 8572),
        CPU_TYPE_ENTRY(8572, 8572_E),
+       CPU_TYPE_ENTRY(P2020, P2020),
+       CPU_TYPE_ENTRY(P2020, P2020_E),
 };
 
 struct cpu_type *identify_cpu(u32 ver)
@@ -144,7 +149,8 @@ int checkcpu (void)
 
        puts("Clock Configuration:");
        for (i = 0; i < CONFIG_NUM_CPUS; i++) {
-                if (!(i & 3)) printf ("\n       ");
+               if (!(i & 3))
+                       printf ("\n       ");
                printf("CPU%d:%-4s MHz, ",
                                i,strmhz(buf1, sysinfo.freqProcessor[i]));
        }
@@ -392,5 +398,19 @@ int cpu_eth_init(bd_t *bis)
 #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC)
        tsec_standard_init(bis);
 #endif
+
        return 0;
 }
+
+/*
+ * Initializes on-chip MMC controllers.
+ * to override, implement board_mmc_init()
+ */
+int cpu_mmc_init(bd_t *bis)
+{
+#ifdef CONFIG_FSL_ESDHC
+       return fsl_esdhc_mmc_init(bis);
+#else
+       return 0;
+#endif
+}