#include <config.h>
#include <mpc83xx.h>
+#include <timestamp.h>
#include <version.h>
#define CONFIG_83XX 1 /* needed for Linux kernel header files*/
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii " ", CONFIG_IDENT_STRING, "\0"
+ .align 2
+
+ .globl enable_addr_trans
+enable_addr_trans:
+ /* enable address translation */
+ mfmsr r5
+ ori r5, r5, (MSR_IR | MSR_DR)
+ mtmsr r5
+ isync
+ blr
+
+ .globl disable_addr_trans
+disable_addr_trans:
+ /* disable address translation */
+ mflr r4
+ mfmsr r3
+ andi. r0, r3, (MSR_IR | MSR_DR)
+ beqlr
+ andc r3, r3, r0
+ mtspr SRR0, r4
+ mtspr SRR1, r3
+ rfi
+
+ .globl get_pvr
+get_pvr:
+ mfspr r3, PVR
+ blr
+
+ .globl ppcDWstore
+ppcDWstore:
+ lfd 1, 0(r4)
+ stfd 1, 0(r3)
+ blr
+
+ .globl ppcDWload
+ppcDWload:
+ lfd 1, 0(r3)
+ stfd 1, 0(r4)
+ blr
#ifndef CONFIG_DEFAULT_IMMR
#error CONFIG_DEFAULT_IMMR must be defined
nop
boot_warm: /* time t 5 */
mfmsr r5 /* save msr contents */
+
+ /* 83xx manuals prescribe a specific sequence for updating IMMRBAR. */
+ bl 1f
+1: mflr r7
+
lis r3, CONFIG_SYS_IMMR@h
ori r3, r3, CONFIG_SYS_IMMR@l
+
+ lwz r6, IMMRBAR(r4)
+ isync
+
stw r3, IMMRBAR(r4)
+ lwz r6, 0(r7) /* Arbitrary external load */
+ isync
+
+ lwz r6, IMMRBAR(r3)
+ isync
/* Initialise the E300 processor core */
/*------------------------------------------*/
+#ifdef CONFIG_NAND_SPL
+ /* The FCM begins execution after only the first page
+ * is loaded. Wait for the rest before branching
+ * to another flash page.
+ */
+1: lwz r6, 0x50b0(r3)
+ andi. r6, r6, 1
+ beq 1b
+#endif
+
bl init_e300_core
#ifdef CONFIG_SYS_FLASHBOOT
blr
- .globl enable_addr_trans
-enable_addr_trans:
- /* enable address translation */
- mfmsr r5
- ori r5, r5, (MSR_IR | MSR_DR)
- mtmsr r5
- isync
- blr
-
- .globl disable_addr_trans
-disable_addr_trans:
- /* disable address translation */
- mflr r4
- mfmsr r3
- andi. r0, r3, (MSR_IR | MSR_DR)
- beqlr
- andc r3, r3, r0
- mtspr SRR0, r4
- mtspr SRR1, r3
- rfi
-
/* Cache functions.
*
* Note: requires that all cache bits in
b 1b
2: blr
- .globl get_pvr
-get_pvr:
- mfspr r3, PVR
- blr
-
- .globl ppcDWstore
-ppcDWstore:
- lfd 1, 0(r4)
- stfd 1, 0(r3)
- blr
-
- .globl ppcDWload
-ppcDWload:
- lfd 1, 0(r3)
- stfd 1, 0(r4)
- blr
-
/*-------------------------------------------------------------------*/
/*
sub r11,r3,r11
addi r3,r3,-4
1: lwzu r0,4(r3)
+ cmpwi r0,0
+ beq- 2f
add r0,r0,r11
stw r0,0(r3)
- bdnz 1b
+2: bdnz 1b
#ifndef CONFIG_NAND_SPL
/*
* Now adjust the fixups and the pointers to the fixups
* in case we need to move ourselves again.
*/
-2: li r0,__fixup_entries@sectoff@l
+ li r0,__fixup_entries@sectoff@l
lwz r3,GOT(_FIXUP_TABLE_)
cmpwi r0,0
mtctr r0