hose->regions[i].bus_start = 0;
hose->regions[i].phys_start = 0;
hose->regions[i].size = gd->ram_size;
- hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_MEMORY;
+ hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_SYS_MEMORY;
- hose->first_busno = 0;
+ hose->first_busno = pci_last_busno() + 1;
hose->last_busno = 0xff;
pci_setup_indirect(hose, CONFIG_SYS_IMMR + 0x8300 + bus * 0x80,
#ifdef CONFIG_PCI_SCAN_SHOW
printf("PCI: Bus Dev VenId DevId Class Int\n");
#endif
+#ifndef CONFIG_PCISLAVE
/*
* Hose scan.
*/
hose->last_busno = pci_hose_scan(hose);
+#endif
}
/*
pci_hose_read_config_word (hose, dev, PCI_FUNCTION_CONFIG, ®16);
reg16 &= ~(PCI_FUNCTION_CFG_LOCK);
pci_hose_write_config_word (hose, dev, PCI_FUNCTION_CONFIG, reg16);
+
+ /* The configuration bit is now unlocked, so we can scan the bus */
+ hose->last_busno = pci_hose_scan(hose);
}
#endif
path = fdt_getprop(blob, nodeoffset, "pci1", NULL);
if (path) {
- tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
- tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
+ tmp[0] = cpu_to_be32(pci_hose[1].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[1].last_busno);
do_fixup_by_path(blob, path, "bus-range",
&tmp, sizeof(tmp), 1);