help: Correct syntax of nandecc help output.

[oweals/u-boot.git] / cpu / mpc83xx / cpu.c

diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index 876f5c731a8595620588078b57274ff18b2979b2..e38a3722ca25f6fc7c8f082cbb787f770b6d28e5 100644 (file)
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -276,115 +276,16 @@ void watchdog_reset (void)
 }
 #endif
 
-#if defined(CONFIG_DDR_ECC)
-void dma_init(void)
-{
-       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile dma83xx_t *dma = &immap->dma;
-       volatile u32 status = swab32(dma->dmasr0);
-       volatile u32 dmamr0 = swab32(dma->dmamr0);
-
-       debug("DMA-init\n");
-
-       /* initialize DMASARn, DMADAR and DMAABCRn */
-       dma->dmadar0 = (u32)0;
-       dma->dmasar0 = (u32)0;
-       dma->dmabcr0 = 0;
-
-       __asm__ __volatile__ ("sync");
-       __asm__ __volatile__ ("isync");
-
-       /* clear CS bit */
-       dmamr0 &= ~DMA_CHANNEL_START;
-       dma->dmamr0 = swab32(dmamr0);
-       __asm__ __volatile__ ("sync");
-       __asm__ __volatile__ ("isync");
-
-       /* while the channel is busy, spin */
-       while(status & DMA_CHANNEL_BUSY) {
-               status = swab32(dma->dmasr0);
-       }
-
-       debug("DMA-init end\n");
-}
-
-uint dma_check(void)
-{
-       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile dma83xx_t *dma = &immap->dma;
-       volatile u32 status = swab32(dma->dmasr0);
-       volatile u32 byte_count = swab32(dma->dmabcr0);
-
-       /* while the channel is busy, spin */
-       while (status & DMA_CHANNEL_BUSY) {
-               status = swab32(dma->dmasr0);
-       }
-
-       if (status & DMA_CHANNEL_TRANSFER_ERROR) {
-               printf ("DMA Error: status = %x @ %d\n", status, byte_count);
-       }
-
-       return status;
-}
-
-int dma_xfer(void *dest, u32 count, void *src)
-{
-       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-       volatile dma83xx_t *dma = &immap->dma;
-       volatile u32 dmamr0;
-
-       /* initialize DMASARn, DMADAR and DMAABCRn */
-       dma->dmadar0 = swab32((u32)dest);
-       dma->dmasar0 = swab32((u32)src);
-       dma->dmabcr0 = swab32(count);
-
-       __asm__ __volatile__ ("sync");
-       __asm__ __volatile__ ("isync");
-
-       /* init direct transfer, clear CS bit */
-       dmamr0 = (DMA_CHANNEL_TRANSFER_MODE_DIRECT |
-                       DMA_CHANNEL_SOURCE_ADDRESS_HOLD_8B |
-                       DMA_CHANNEL_SOURCE_ADRESSS_HOLD_EN);
-
-       dma->dmamr0 = swab32(dmamr0);
-
-       __asm__ __volatile__ ("sync");
-       __asm__ __volatile__ ("isync");
-
-       /* set CS to start DMA transfer */
-       dmamr0 |= DMA_CHANNEL_START;
-       dma->dmamr0 = swab32(dmamr0);
-       __asm__ __volatile__ ("sync");
-       __asm__ __volatile__ ("isync");
-
-       return ((int)dma_check());
-}
-#endif /*CONFIG_DDR_ECC*/
-
 /*
  * Initializes on-chip ethernet controllers.
  * to override, implement board_eth_init()
  */
 int cpu_eth_init(bd_t *bis)
 {
-#if defined(CONFIG_UEC_ETH1)
-       uec_initialize(0);
-#endif
-#if defined(CONFIG_UEC_ETH2)
-       uec_initialize(1);
-#endif
-#if defined(CONFIG_UEC_ETH3)
-       uec_initialize(2);
-#endif
-#if defined(CONFIG_UEC_ETH4)
-       uec_initialize(3);
-#endif
-#if defined(CONFIG_UEC_ETH5)
-       uec_initialize(4);
-#endif
-#if defined(CONFIG_UEC_ETH6)
-       uec_initialize(5);
+#if defined(CONFIG_UEC_ETH)
+       uec_standard_init(bis);
 #endif
+
 #if defined(CONFIG_TSEC_ENET)
        tsec_standard_init(bis);
 #endif