*/
#include <config.h>
#include <mpc5xxx.h>
+#include <timestamp.h>
#include <version.h>
-#define CONFIG_MPC5XXX 1 /* needed for Linux kernel header files */
+#define CONFIG_MPC5xxx 1 /* needed for Linux kernel header files */
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
#include <ppc_asm.tmpl>
/*
* Set up GOT: Global Offset Table
*
- * Use r14 to access the GOT
+ * Use r12 to access the GOT
*/
START_GOT
GOT_ENTRY(_GOT2_TABLE_)
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
/*
boot_warm:
mfmsr r5 /* save msr contents */
-#if defined(CFG_LOWBOOT)
-#if defined(CFG_RAMBOOT)
-#error CFG_LOWBOOT is incompatible with CFG_RAMBOOT
-#endif /* CFG_RAMBOOT */
- lis r4, CFG_DEFAULT_MBAR@h
- lis r3, 0x0000FF00@h
- ori r3, r3, 0x0000FF00@l
- stw r3, 0x4(r4)
- lis r3, 0x0000FFFF@h
- ori r3, r3, 0x0000FFFF@l
- stw r3, 0x8(r4)
- lis r3, 0x00047800@h
- ori r3, r3, 0x00047800@l
- stw r3, 0x300(r4)
+ /* Move CSBoot and adjust instruction pointer */
+ /*--------------------------------------------------------------*/
+
+#if defined(CONFIG_SYS_LOWBOOT)
+# if defined(CONFIG_SYS_RAMBOOT)
+# error CONFIG_SYS_LOWBOOT is incompatible with CONFIG_SYS_RAMBOOT
+# endif /* CONFIG_SYS_RAMBOOT */
+ lis r4, CONFIG_SYS_DEFAULT_MBAR@h
+ lis r3, START_REG(CONFIG_SYS_BOOTCS_START)@h
+ ori r3, r3, START_REG(CONFIG_SYS_BOOTCS_START)@l
+ stw r3, 0x4(r4) /* CS0 start */
+ lis r3, STOP_REG(CONFIG_SYS_BOOTCS_START, CONFIG_SYS_BOOTCS_SIZE)@h
+ ori r3, r3, STOP_REG(CONFIG_SYS_BOOTCS_START, CONFIG_SYS_BOOTCS_SIZE)@l
+ stw r3, 0x8(r4) /* CS0 stop */
lis r3, 0x02010000@h
ori r3, r3, 0x02010000@l
- stw r3, 0x54(r4)
+ stw r3, 0x54(r4) /* CS0 and Boot enable */
- lis r3, lowboot_reentry@h
- ori r3, r3, lowboot_reentry@l
+ lis r3, lowboot_reentry@h /* jump from bootlow address space (0x0000xxxx) */
+ ori r3, r3, lowboot_reentry@l /* to the address space the linker used */
mtlr r3
- blr /* jump to flash based address */
+ blr
lowboot_reentry:
- lis r3, 0x0000FF00@h
- ori r3, r3, 0x0000FF00@l
- stw r3, 0x4c(r4)
- lis r3, 0x0000FFFF@h
- ori r3, r3, 0x0000FFFF@l
- stw r3, 0x50(r4)
- lis r3, 0x00047800@h
- ori r3, r3, 0x00047800@l
- stw r3, 0x300(r4)
+ lis r3, START_REG(CONFIG_SYS_BOOTCS_START)@h
+ ori r3, r3, START_REG(CONFIG_SYS_BOOTCS_START)@l
+ stw r3, 0x4c(r4) /* Boot start */
+ lis r3, STOP_REG(CONFIG_SYS_BOOTCS_START, CONFIG_SYS_BOOTCS_SIZE)@h
+ ori r3, r3, STOP_REG(CONFIG_SYS_BOOTCS_START, CONFIG_SYS_BOOTCS_SIZE)@l
+ stw r3, 0x50(r4) /* Boot stop */
lis r3, 0x02000001@h
ori r3, r3, 0x02000001@l
- stw r3, 0x54(r4)
-#endif /* CFG_LOWBOOT */
+ stw r3, 0x54(r4) /* Boot enable, CS0 disable */
+#endif /* CONFIG_SYS_LOWBOOT */
-#if defined(CFG_DEFAULT_MBAR) && !defined(CFG_RAMBOOT)
- lis r3, CFG_MBAR@h
- ori r3, r3, CFG_MBAR@l
-#if defined(CONFIG_MPC5200)
+#if defined(CONFIG_SYS_DEFAULT_MBAR) && !defined(CONFIG_SYS_RAMBOOT)
+ lis r3, CONFIG_SYS_MBAR@h
+ ori r3, r3, CONFIG_SYS_MBAR@l
/* MBAR is mirrored into the MBAR SPR */
mtspr MBAR,r3
rlwinm r3, r3, 16, 16, 31
-#endif
-#if defined(CONFIG_MGT5100)
- rlwinm r3, r3, 17, 15, 31
-#endif
- lis r4, CFG_DEFAULT_MBAR@h
+ lis r4, CONFIG_SYS_DEFAULT_MBAR@h
stw r3, 0(r4)
-#endif /* CFG_DEFAULT_MBAR */
+#endif /* CONFIG_SYS_DEFAULT_MBAR */
/* Initialise the MPC5xxx processor core */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* set up stack in on-chip SRAM */
- lis r3, CFG_INIT_RAM_ADDR@h
- ori r3, r3, CFG_INIT_RAM_ADDR@l
- ori r1, r3, CFG_INIT_SP_OFFSET
+ lis r3, CONFIG_SYS_INIT_RAM_ADDR@h
+ ori r3, r3, CONFIG_SYS_INIT_RAM_ADDR@l
+ ori r1, r3, CONFIG_SYS_INIT_SP_OFFSET
li r0, 0 /* Make room for stack frame header and */
stwu r0, -4(r1) /* clear final stack frame so that */
stwu r0, -4(r1) /* stack backtraces terminate cleanly */
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
stw r5,_DSISR(r21)
addi r3,r1,STACK_FRAME_OVERHEAD
- li r20,MSR_KERNEL
- rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
- rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */
- lwz r6,GOT(transfer_to_handler)
- mtlr r6
- blrl
-.L_Alignment:
- .long AlignmentException - _start + EXC_OFF_SYS_RESET
- .long int_return - _start + EXC_OFF_SYS_RESET
+ EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
- li r20,MSR_KERNEL
- rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
- rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */
- lwz r6,GOT(transfer_to_handler)
- mtlr r6
- blrl
-.L_ProgramCheck:
- .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
- .long int_return - _start + EXC_OFF_SYS_RESET
+ EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
+ MSR_KERNEL, COPY_EE)
STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
/* HID0 also contains cache control */
/*--------------------------------------------------------------*/
- lis r3, CFG_HID0_INIT@h
- ori r3, r3, CFG_HID0_INIT@l
+ lis r3, CONFIG_SYS_HID0_INIT@h
+ ori r3, r3, CONFIG_SYS_HID0_INIT@l
SYNC
mtspr HID0, r3
- lis r3, CFG_HID0_FINAL@h
- ori r3, r3, CFG_HID0_FINAL@l
+ lis r3, CONFIG_SYS_HID0_FINAL@h
+ ori r3, r3, CONFIG_SYS_HID0_FINAL@l
SYNC
mtspr HID0, r3
rlwinm r3, r3, HID0_DCE_BITPOS + 1, 31, 31
blr
+ .globl get_svr
+get_svr:
+ mfspr r3, SVR
+ blr
+
.globl get_pvr
get_pvr:
mfspr r3, PVR
mr r9, r4 /* Save copy of Global Data pointer */
mr r10, r5 /* Save copy of Destination Address */
+ GET_GOT
mr r3, r5 /* Destination Address */
- lis r4, CFG_MONITOR_BASE@h /* Source Address */
- ori r4, r4, CFG_MONITOR_BASE@l
+ lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
+ ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
lwz r5, GOT(__init_end)
sub r5, r5, r4
- li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
+ li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
/*
* Fix GOT pointer:
*
- * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
+ * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
*
* Offset:
*/
sub r15, r10, r4
/* First our own GOT */
- add r14, r14, r15
+ add r12, r12, r15
/* then the one used by the C code */
add r30, r30, r15
in_ram:
/*
- * Relocation Function, r14 point to got2+0x8000
+ * Relocation Function, r12 point to got2+0x8000
*
* Adjust got2 pointers, no need to check for 0, this code
* already puts a few entries in the table.
sub r11,r3,r11
addi r3,r3,-4
1: lwzu r0,4(r3)
+ cmpwi r0,0
+ beq- 2f
add r0,r0,r11
stw r0,0(r3)
- bdnz 1b
+2: bdnz 1b
/*
* Now adjust the fixups and the pointers to the fixups
* in case we need to move ourselves again.
*/
-2: li r0,__fixup_entries@sectoff@l
+ li r0,__fixup_entries@sectoff@l
lwz r3,GOT(_FIXUP_TABLE_)
cmpwi r0,0
mtctr r0
*/
.globl trap_init
trap_init:
+ mflr r4 /* save link register */
+ GET_GOT
lwz r7, GOT(_start)
lwz r8, GOT(_end_of_vectors)
cmplw 0, r7, r8
bgelr /* return if r7>=r8 - just in case */
-
- mflr r4 /* save link register */
1:
lwz r0, 0(r7)
stw r0, 0(r9)
mtlr r4 /* restore link register */
blr
-
- /*
- * Function: relocate entries for one exception vector
- */
-trap_reloc:
- lwz r0, 0(r7) /* hdlr ... */
- add r0, r0, r3 /* ... += dest_addr */
- stw r0, 0(r7)
-
- lwz r0, 4(r7) /* int_return ... */
- add r0, r0, r3 /* ... += dest_addr */
- stw r0, 4(r7)
-
- blr
projects / oweals / u-boot.git / blobdiff