Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash

[oweals/u-boot.git] / cpu / mpc5xxx / start.S

diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S
index 216c1c88f39013e4e923099ccc9cf2295108c79e..9b1bd48c7338299dfd98ecd5c4b81b7ddb70db61 100644 (file)
--- a/cpu/mpc5xxx/start.S
+++ b/cpu/mpc5xxx/start.S
@@ -29,7 +29,7 @@
 #include <mpc5xxx.h>
 #include <version.h>
 
-#define CONFIG_MPC5XXX 1       /* needed for Linux kernel header files */
+#define CONFIG_MPC5xxx 1       /* needed for Linux kernel header files */
 #define _LINUX_CONFIG_H 1      /* avoid reading Linux autoconf.h file  */
 
 #include <ppc_asm.tmpl>
@@ -103,10 +103,50 @@ boot_cold:
 boot_warm:
        mfmsr   r5                      /* save msr contents            */
 
+       /* Move CSBoot and adjust instruction pointer                   */
+       /*--------------------------------------------------------------*/
+
+#if defined(CFG_LOWBOOT)
+# if defined(CFG_RAMBOOT)
+#  error CFG_LOWBOOT is incompatible with CFG_RAMBOOT
+# endif /* CFG_RAMBOOT */
+# if defined(CONFIG_MGT5100)
+#  error CFG_LOWBOOT is incompatible with MGT5100
+# endif /* CONFIG_MGT5100 */
+       lis     r4, CFG_DEFAULT_MBAR@h
+       lis     r3,     START_REG(CFG_BOOTCS_START)@h
+       ori     r3, r3, START_REG(CFG_BOOTCS_START)@l
+       stw     r3, 0x4(r4)             /* CS0 start */
+       lis     r3,     STOP_REG(CFG_BOOTCS_START, CFG_BOOTCS_SIZE)@h
+       ori     r3, r3, STOP_REG(CFG_BOOTCS_START, CFG_BOOTCS_SIZE)@l
+       stw     r3, 0x8(r4)             /* CS0 stop */
+       lis     r3,     0x02010000@h
+       ori     r3, r3, 0x02010000@l
+       stw     r3, 0x54(r4)            /* CS0 and Boot enable */
+
+       lis     r3,     lowboot_reentry@h       /* jump from bootlow address space (0x0000xxxx) */
+       ori     r3, r3, lowboot_reentry@l       /* to the address space the linker used */
+       mtlr    r3
+       blr
+
+lowboot_reentry:
+       lis     r3,     START_REG(CFG_BOOTCS_START)@h
+       ori     r3, r3, START_REG(CFG_BOOTCS_START)@l
+       stw     r3, 0x4c(r4)            /* Boot start */
+       lis     r3,     STOP_REG(CFG_BOOTCS_START, CFG_BOOTCS_SIZE)@h
+       ori     r3, r3, STOP_REG(CFG_BOOTCS_START, CFG_BOOTCS_SIZE)@l
+       stw     r3, 0x50(r4)            /* Boot stop */
+       lis     r3,     0x02000001@h
+       ori     r3, r3, 0x02000001@l
+       stw     r3, 0x54(r4)            /* Boot enable, CS0 disable */
+#endif /* CFG_LOWBOOT */
+
 #if defined(CFG_DEFAULT_MBAR) && !defined(CFG_RAMBOOT)
        lis     r3, CFG_MBAR@h
        ori     r3, r3, CFG_MBAR@l
 #if defined(CONFIG_MPC5200)
+       /* MBAR is mirrored into the MBAR SPR */
+       mtspr   MBAR,r3
        rlwinm  r3, r3, 16, 16, 31
 #endif
 #if defined(CONFIG_MGT5100)
@@ -168,7 +208,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -187,7 +227,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
@@ -382,6 +422,14 @@ init_5xxx_core:
        mtspr   DBAT2L, r0
        mtspr   DBAT3U, r0
        mtspr   DBAT3L, r0
+       mtspr   DBAT4U, r0
+       mtspr   DBAT4L, r0
+       mtspr   DBAT5U, r0
+       mtspr   DBAT5L, r0
+       mtspr   DBAT6U, r0
+       mtspr   DBAT6L, r0
+       mtspr   DBAT7U, r0
+       mtspr   DBAT7L, r0
        mtspr   IBAT0U, r0
        mtspr   IBAT0L, r0
        mtspr   IBAT1U, r0
@@ -390,6 +438,14 @@ init_5xxx_core:
        mtspr   IBAT2L, r0
        mtspr   IBAT3U, r0
        mtspr   IBAT3L, r0
+       mtspr   IBAT4U, r0
+       mtspr   IBAT4L, r0
+       mtspr   IBAT5U, r0
+       mtspr   IBAT5L, r0
+       mtspr   IBAT6U, r0
+       mtspr   IBAT6L, r0
+       mtspr   IBAT7U, r0
+       mtspr   IBAT7L, r0
        SYNC
 
        /* invalidate all tlb's                                         */
@@ -496,6 +552,11 @@ dcache_status:
        rlwinm  r3, r3, HID0_DCE_BITPOS + 1, 31, 31
        blr
 
+       .globl get_svr
+get_svr:
+       mfspr   r3, SVR
+       blr
+
        .globl get_pvr
 get_pvr:
        mfspr   r3, PVR