Merge remote branch 'origin/master' into next

[oweals/u-boot.git] / cpu / mpc5xxx / serial.c

diff --git a/cpu/mpc5xxx/serial.c b/cpu/mpc5xxx/serial.c
index 6cb523d3c7bf5428d03497341d11906e93d50bcf..66759887c66c7d1de2290278202ef85f81d048b7 100644 (file)
--- a/cpu/mpc5xxx/serial.c
+++ b/cpu/mpc5xxx/serial.c
@@ -50,8 +50,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PSC_BASE MPC5XXX_PSC2
 #elif CONFIG_PSC_CONSOLE == 3
 #define PSC_BASE MPC5XXX_PSC3
-#elif defined(CONFIG_MGT5100)
-#error CONFIG_PSC_CONSOLE must be in 1, 2 or 3
 #elif CONFIG_PSC_CONSOLE == 4
 #define PSC_BASE MPC5XXX_PSC4
 #elif CONFIG_PSC_CONSOLE == 5
@@ -73,8 +71,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PSC_BASE2 MPC5XXX_PSC2
 #elif CONFIG_PSC_CONSOLE2 == 3
 #define PSC_BASE2 MPC5XXX_PSC3
-#elif defined(CONFIG_MGT5100)
-#error CONFIG_PSC_CONSOLE2 must be in 1, 2 or 3
 #elif CONFIG_PSC_CONSOLE2 == 4
 #define PSC_BASE2 MPC5XXX_PSC4
 #elif CONFIG_PSC_CONSOLE2 == 5
@@ -104,23 +100,14 @@ int serial_init (void)
        psc->command = PSC_SEL_MODE_REG_1;
 
        /* select clock sources */
-#if defined(CONFIG_MGT5100)
-       psc->psc_clock_select = 0xdd00;
-       baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32;
-#elif defined(CONFIG_MPC5200)
        psc->psc_clock_select = 0;
        baseclk = (gd->ipb_clk + 16) / 32;
-#endif
 
        /* switch to UART mode */
        psc->sicr = 0;
 
        /* configure parity, bit length and so on */
-#if defined(CONFIG_MGT5100)
-       psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE;
-#elif defined(CONFIG_MPC5200)
        psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
-#endif
        psc->mode = PSC_MODE_ONE_STOP;
 
        /* set up UART divisor */
@@ -165,6 +152,25 @@ void serial_putc(const char c)
        psc->psc_buffer_8 = c;
 }
 
+#if defined(CONFIG_SERIAL_MULTI)
+void serial_putc_raw_dev(unsigned long dev_base, const char c)
+#else
+void serial_putc_raw(const char c)
+#endif
+{
+#if defined(CONFIG_SERIAL_MULTI)
+       volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
+#else
+       volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#endif
+       /* Wait for last character to go. */
+       while (!(psc->psc_status & PSC_SR_TXEMP))
+               ;
+
+       psc->psc_buffer_8 = c;
+}
+
+
 #if defined(CONFIG_SERIAL_MULTI)
 void serial_puts_dev (unsigned long dev_base, const char *s)
 #else
@@ -227,11 +233,7 @@ void serial_setbrg(void)
 #endif
        unsigned long baseclk, div;
 
-#if defined(CONFIG_MGT5100)
-       baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32;
-#elif defined(CONFIG_MPC5200)
        baseclk = (gd->ipb_clk + 16) / 32;
-#endif
 
        /* set up UART divisor */
        div = (baseclk + (gd->baudrate/2)) / gd->baudrate;
@@ -239,6 +241,43 @@ void serial_setbrg(void)
        psc->ctlr =  div & 0xff;
 }
 
+#if defined(CONFIG_SERIAL_MULTI)
+void serial_setrts_dev (unsigned long dev_base, int s)
+#else
+void serial_setrts(int s)
+#endif
+{
+#if defined(CONFIG_SERIAL_MULTI)
+       volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
+#else
+       volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#endif
+
+       if (s) {
+               /* Assert RTS (become LOW) */
+               psc->op1 = 0x1;
+       }
+       else {
+               /* Negate RTS (become HIGH) */
+               psc->op0 = 0x1;
+       }
+}
+
+#if defined(CONFIG_SERIAL_MULTI)
+int serial_getcts_dev (unsigned long dev_base)
+#else
+int serial_getcts(void)
+#endif
+{
+#if defined(CONFIG_SERIAL_MULTI)
+       volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
+#else
+       volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
+#endif
+
+       return (psc->ip & 0x1) ? 0 : 1;
+}
+
 #if defined(CONFIG_SERIAL_MULTI)
 int serial0_init(void)
 {