85xx: Fix how we map DDR memory

[oweals/u-boot.git] / cpu / mips / au1x00_serial.c

diff --git a/cpu/mips/au1x00_serial.c b/cpu/mips/au1x00_serial.c
index 99e24897fd4a3703c46b5dbc9f42044e4dea3498..c25ba5a5b3fc01130998fb652670094051aee72a 100644 (file)
--- a/cpu/mips/au1x00_serial.c
+++ b/cpu/mips/au1x00_serial.c
@@ -26,9 +26,6 @@
  */
 
 #include <config.h>
-
-#ifdef CONFIG_AU1X00
-
 #include <common.h>
 #include <asm/au1x00.h>
 
@@ -70,9 +67,21 @@ void serial_setbrg (void)
 {
        volatile u32 *uart_clk = (volatile u32*)(UART0_ADDR+UART_CLK);
        volatile u32 *uart_lcr = (volatile u32*)(UART0_ADDR+UART_LCR);
+       volatile u32 *sys_powerctrl = (u32 *)SYS_POWERCTRL;
+       int sd;
+       int divisorx2;
+
+       /* sd is system clock divisor                   */
+       /* see section 10.4.5 in au1550 datasheet       */
+       sd = (*sys_powerctrl & 0x03) + 2;
+
+       /* calulate 2x baudrate and round */
+       divisorx2 = ((CONFIG_SYS_MIPS_TIMER_FREQ/(sd * 16 * CONFIG_BAUDRATE)));
+
+       if (divisorx2 & 0x01)
+               divisorx2 = divisorx2 + 1;
 
-       /* Set baudrate to 115200 */
-       *uart_clk = 0x36;
+       *uart_clk = divisorx2 / 2;
 
        /* Set parity, stop bits and word length to 8N1 */
        *uart_lcr = UART_LCR_WLEN8;
@@ -120,4 +129,3 @@ int serial_tstc (void)
        }
        return 0;
 }
-#endif /* CONFIG_SERIAL_AU1X00 */