85xx: Fix how we map DDR memory

[oweals/u-boot.git] / cpu / mips / au1x00_eth.c

diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index 35c07b1461cf30b1e9755ca7a97af97906b7ae4d..6272a3aac119dd34be822b0391fd680e844fb596 100644 (file)
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -13,7 +13,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -23,30 +23,28 @@
  */
 #include <config.h>
 
-#ifdef CONFIG_AU1X00
-
-#if defined(CFG_DISCOVER_PHY) || (CONFIG_COMMANDS & CFG_CMD_MII)
-#error "PHY and MII not supported yet"
+#if defined(CONFIG_SYS_DISCOVER_PHY)
+#error "PHY not supported yet"
 /* We just assume that we are running 100FD for now */
 /* We all use switches, right? ;-) */
 #endif
 
 /* I assume ethernet behaves like au1000 */
 
-#ifdef CONFIG_AU1000
+#ifdef CONFIG_SOC_AU1000
 /* Base address differ between cpu:s */
 #define ETH0_BASE AU1000_ETH0_BASE
 #define MAC0_ENABLE AU1000_MAC0_ENABLE
 #else
-#ifdef CONFIG_AU1100
+#ifdef CONFIG_SOC_AU1100
 #define ETH0_BASE AU1100_ETH0_BASE
 #define MAC0_ENABLE AU1100_MAC0_ENABLE
 #else
-#ifdef CONFIG_AU1500
+#ifdef CONFIG_SOC_AU1500
 #define ETH0_BASE AU1500_ETH0_BASE
 #define MAC0_ENABLE AU1500_MAC0_ENABLE
 #else
-#ifdef CONFIG_AU1550
+#ifdef CONFIG_SOC_AU1550
 #define ETH0_BASE AU1550_ETH0_BASE
 #define MAC0_ENABLE AU1550_MAC0_ENABLE
 #else
@@ -63,6 +61,10 @@
 #include <asm/io.h>
 #include <asm/au1x00.h>
 
+#if defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+#endif
+
 /* Ethernet Transmit and Receive Buffers */
 #define DBUF_LENGTH  1520
 #define PKT_MAXBUF_SIZE                1518
@@ -86,6 +88,65 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];
 
 #define MAX_WAIT 1000
 
+#if defined(CONFIG_CMD_MII)
+int  au1x00_miiphy_read(char *devname, unsigned char addr,
+               unsigned char reg, unsigned short * value)
+{
+       volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
+       volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
+       u32 mii_control;
+       unsigned int timedout = 20;
+
+       while (*mii_control_reg & MAC_MII_BUSY) {
+               udelay(1000);
+               if (--timedout == 0) {
+                       printf("au1x00_eth: miiphy_read busy timeout!!\n");
+                       return -1;
+               }
+       }
+
+       mii_control = MAC_SET_MII_SELECT_REG(reg) |
+               MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_READ;
+
+       *mii_control_reg = mii_control;
+
+       timedout = 20;
+       while (*mii_control_reg & MAC_MII_BUSY) {
+               udelay(1000);
+               if (--timedout == 0) {
+                       printf("au1x00_eth: miiphy_read busy timeout!!\n");
+                       return -1;
+               }
+       }
+       *value = *mii_data_reg;
+       return 0;
+}
+
+int  au1x00_miiphy_write(char *devname, unsigned char addr,
+               unsigned char reg, unsigned short value)
+{
+       volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
+       volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
+       u32 mii_control;
+       unsigned int timedout = 20;
+
+       while (*mii_control_reg & MAC_MII_BUSY) {
+               udelay(1000);
+               if (--timedout == 0) {
+                       printf("au1x00_eth: miiphy_write busy timeout!!\n");
+                       return -1;
+               }
+       }
+
+       mii_control = MAC_SET_MII_SELECT_REG(reg) |
+               MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_WRITE;
+
+       *mii_data_reg = value;
+       *mii_control_reg = mii_control;
+       return 0;
+}
+#endif
+
 static int au1x00_send(struct eth_device* dev, volatile void *packet, int length){
        volatile mac_fifo_t *fifo_tx =
                (volatile mac_fifo_t*)(MAC0_TX_DMA_ADDR+MAC_TX_BUFF0_STATUS);
@@ -193,9 +254,9 @@ static int au1x00_init(struct eth_device* dev, bd_t * bd){
 
        /* Put mac addr in little endian */
 #define ea eth_get_dev()->enetaddr
-       *mac_addr_high  =       (ea[5] <<  8) | (ea[4]      ) ;
-       *mac_addr_low   =       (ea[3] << 24) | (ea[2] << 16) |
-               (ea[1] <<  8) | (ea[0]      ) ;
+       *mac_addr_high  =       (ea[5] <<  8) | (ea[4]      ) ;
+       *mac_addr_low   =       (ea[3] << 24) | (ea[2] << 16) |
+               (ea[1] <<  8) | (ea[0]      ) ;
 #undef ea
        *mac_mcast_low = 0;
        *mac_mcast_high = 0;
@@ -220,10 +281,14 @@ static void au1x00_halt(struct eth_device* dev){
 int au1x00_enet_initialize(bd_t *bis){
        struct eth_device* dev;
 
-       dev = (struct eth_device*) malloc(sizeof *dev);
+       if ((dev = (struct eth_device*)malloc(sizeof *dev)) == NULL) {
+               puts ("malloc failed\n");
+               return -1;
+       }
+
        memset(dev, 0, sizeof *dev);
 
-       sprintf(dev->name, "Au1X00 ETHERNET");
+       sprintf(dev->name, "Au1X00 ethernet");
        dev->iobase = 0;
        dev->priv   = 0;
        dev->init   = au1x00_init;
@@ -233,7 +298,10 @@ int au1x00_enet_initialize(bd_t *bis){
 
        eth_register(dev);
 
+#if defined(CONFIG_CMD_MII)
+       miiphy_register(dev->name,
+               au1x00_miiphy_read, au1x00_miiphy_write);
+#endif
+
        return 1;
 }
-
-#endif /* CONFIG_AU1X00 */