Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

[oweals/u-boot.git] / cpu / mcf52x2 / interrupts.c

diff --git a/cpu/mcf52x2/interrupts.c b/cpu/mcf52x2/interrupts.c
index d9a35bb8c973ba73d0c819c1234d28129ac47b29..b8fb7bb0eecd710afb7fcae0bfa918495ce52876 100644 (file)
--- a/cpu/mcf52x2/interrupts.c
+++ b/cpu/mcf52x2/interrupts.c
@@ -1,9 +1,10 @@
 /*
- * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
- *
  * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -58,7 +59,7 @@ void dtimer_intr_setup(void)
 #endif                         /* CONFIG_MCFTMR */
 #endif                         /* CONFIG_M5272 */
 
-#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
+#if defined(CONFIG_M5282) || defined(CONFIG_M5271) || defined(CONFIG_M5275)
 int interrupt_init(void)
 {
        volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
@@ -76,13 +77,13 @@ void dtimer_intr_setup(void)
        volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
 
        intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
-       intp->imrl0 &= ~0xFFFFFFFE;
+       intp->imrl0 &= 0xFFFFFFFE;
        intp->imrl0 &= ~CFG_TMRINTR_MASK;
 }
 #endif                         /* CONFIG_MCFTMR */
-#endif                         /* CONFIG_M5282 | CONFIG_M5271 */
+#endif                         /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
 
-#ifdef CONFIG_M5249
+#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
 int interrupt_init(void)
 {
        enable_interrupts();
@@ -94,9 +95,7 @@ int interrupt_init(void)
 void dtimer_intr_setup(void)
 {
        mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
-       mbar_writeByte(MCFSIM_TIMER2ICR,
-                      MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 |
-                      MCFSIM_ICR_PRI3);
+       mbar_writeByte(MCFSIM_TIMER2ICR, CFG_TMRINTR_PRI);
 }
 #endif                         /* CONFIG_MCFTMR */
-#endif                         /* CONFIG_M5249 */
+#endif                         /* CONFIG_M5249 || CONFIG_M5253 */