Coding style cleanup, update CHANGELOG.

[oweals/u-boot.git] / cpu / mcf52x2 / cpu_init.c

diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c
index 32ad6cd1ae66ff708afe06673378da3ce0ae06e2..66f9164d562971bb17a398d43985402b85d2148a 100644 (file)
--- a/cpu/mcf52x2/cpu_init.c
+++ b/cpu/mcf52x2/cpu_init.c
@@ -36,6 +36,12 @@
 #include <watchdog.h>
 #include <asm/immap.h>
 
+#if defined(CONFIG_CMD_NET)
+#include <config.h>
+#include <net.h>
+#include <asm/fec.h>
+#endif
+
 #ifndef CONFIG_M5272
 /* Only 5272 Flexbus chipselect is different from the rest */
 void init_fbcs(void)
@@ -125,7 +131,7 @@ void cpu_init_f(void)
        mbar2_writeByte(MCFSIM_INTBASE, 0x40);  /* Base interrupts at 64 */
        mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
 
-       /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */
+       /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */
 
        /* FlexBus Chipselect */
        init_fbcs();
@@ -207,6 +213,19 @@ void uart_port_conf(void)
                break;
        }
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+       if (setclear) {
+               /* Enable Ethernet pins */
+               mbar_writeByte(MCF_GPIO_PAR_FECI2C, CONFIG_SYS_FECI2C);
+       } else {
+       }
+
+       return 0;
+}
+#endif                         /* CONFIG_CMD_NET */
 #endif
 
 #if defined(CONFIG_M5272)
@@ -309,6 +328,22 @@ void uart_port_conf(void)
                break;
        }
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+       volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+       if (setclear) {
+               gpio->gpio_pbcnt |= GPIO_PBCNT_E_MDC | GPIO_PBCNT_E_RXER |
+                                   GPIO_PBCNT_E_RXD1 | GPIO_PBCNT_E_RXD2 |
+                                   GPIO_PBCNT_E_RXD3 | GPIO_PBCNT_E_TXD1 |
+                                   GPIO_PBCNT_E_TXD2 | GPIO_PBCNT_E_TXD3;
+       } else {
+       }
+       return 0;
+}
+#endif                         /* CONFIG_CMD_NET */
 #endif                         /* #if defined(CONFIG_M5272) */
 
 #if defined(CONFIG_M5275)
@@ -372,6 +407,35 @@ void uart_port_conf(void)
                break;
        }
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+       struct fec_info_s *info = (struct fec_info_s *) dev->priv;
+       volatile gpio_t *gpio = (gpio_t *)MMAP_GPIO;
+
+       if (setclear) {
+               /* Enable Ethernet pins */
+               if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
+                       gpio->par_feci2c |= 0x0F00;
+                       gpio->par_fec0hl |= 0xC0;
+               } else {
+                       gpio->par_feci2c |= 0x00A0;
+                       gpio->par_fec1hl |= 0xC0;
+               }
+       } else {
+               if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
+                       gpio->par_feci2c &= ~0x0F00;
+                       gpio->par_fec0hl &= ~0xC0;
+               } else {
+                       gpio->par_feci2c &= ~0x00A0;
+                       gpio->par_fec1hl &= ~0xC0;
+               }
+       }
+
+       return 0;
+}
+#endif                         /* CONFIG_CMD_NET */
 #endif                         /* #if defined(CONFIG_M5275) */
 
 #if defined(CONFIG_M5282)
@@ -469,6 +533,20 @@ void uart_port_conf(void)
                break;
        }
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+       if (setclear) {
+               MCFGPIO_PASPAR |= 0x0F00;
+               MCFGPIO_PEHLPAR = CONFIG_SYS_PEHLPAR;
+       } else {
+               MCFGPIO_PASPAR &= 0xF0FF;
+               MCFGPIO_PEHLPAR &= ~CONFIG_SYS_PEHLPAR;
+       }
+       return 0;
+}
+#endif                 /* CONFIG_CMD_NET */
 #endif
 
 #if defined(CONFIG_M5249)