Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx

[oweals/u-boot.git] / cpu / mcf52x2 / cpu.c

diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c
index 96fe3711bb50b20d3a10c2cfd20be45fa39b476c..c4c5d5060491be58f2d3bff5db83270fbc08c578 100644 (file)
--- a/cpu/mcf52x2/cpu.c
+++ b/cpu/mcf52x2/cpu.c
@@ -6,6 +6,9 @@
  * (C) Copyright 2005
  * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
  *
+ * MCF5275 additions
+ * Copyright (C) 2008 Arthur Shipkowski (art@videon-central.com)
+ *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -29,6 +32,74 @@
 #include <watchdog.h>
 #include <command.h>
 #include <asm/immap.h>
+#include <netdev.h>
+#include "cpu.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_M5208
+int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+{
+       volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM);
+
+       udelay(1000);
+
+       rcm->rcr = RCM_RCR_SOFTRST;
+
+       /* we don't return! */
+       return 0;
+};
+
+int checkcpu(void)
+{
+       char buf1[32], buf2[32];
+
+       printf("CPU:   Freescale Coldfire MCF5208\n"
+              "       CPU CLK %s MHz BUS CLK %s MHz\n",
+              strmhz(buf1, gd->cpu_clk),
+              strmhz(buf2, gd->bus_clk));
+       return 0;
+};
+
+#if defined(CONFIG_WATCHDOG)
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+       volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+       wdt->sr = 0x5555;
+       wdt->sr = 0xAAAA;
+}
+
+int watchdog_disable(void)
+{
+       volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+
+       wdt->sr = 0x5555; /* reset watchdog counteDECLARE_GLOBAL_DATA_PTR;
+r */
+       wdt->sr = 0xAAAA;
+       wdt->cr = 0;    /* disable watchdog timer */
+
+       puts("WATCHDOG:disabled\n");
+       return (0);
+}
+
+int watchdog_init(void)
+{
+       volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+
+       wdt->cr = 0;    /* disable watchdog */
+
+       /* set timeout and enable watchdog */
+       wdt->mr =
+               ((CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000)) - 1;
+       wdt->sr = 0x5555; /* reset watchdog counter */
+       wdt->sr = 0xAAAA;
+
+       puts("WATCHDOG:enabled\n");
+       return (0);
+}
+#endif                         /* #ifdef CONFIG_WATCHDOG */
+#endif                         /* #ifdef CONFIG_M5208 */
 
 #ifdef  CONFIG_M5271
 /*
@@ -62,17 +133,22 @@ int checkcpu(void)
 
        if (cpu_model)
                printf("CPU:   Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
-                      cpu_model, prn, strmhz(buf, CFG_CLK));
+                      cpu_model, prn, strmhz(buf, CONFIG_SYS_CLK));
        else
                printf("CPU:   Unknown - Freescale ColdFire MCF5271 family"
                       " (PIN: 0x%x) rev. %hu, at %s MHz\n",
-                      pin, prn, strmhz(buf, CFG_CLK));
+                      pin, prn, strmhz(buf, CONFIG_SYS_CLK));
 
        return 0;
 }
 
 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 {
+       /* Call the board specific reset actions first. */
+       if(board_reset) {
+               board_reset();
+       }
+
        mbar_writeByte(MCF_RCM_RCR,
                       MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
        return 0;
@@ -170,7 +246,7 @@ int watchdog_init(void)
 
        /* set timeout and enable watchdog */
        wdt->wdog_wrrr =
-           ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
+           ((CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000)) - 1;
        wdt->wdog_wcr = 0;      /* reset watchdog counter */
 
        puts("WATCHDOG:enabled\n");
@@ -180,6 +256,69 @@ int watchdog_init(void)
 
 #endif                         /* #ifdef CONFIG_M5272 */
 
+#ifdef CONFIG_M5275
+int do_reset(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+{
+       volatile rcm_t *rcm = (rcm_t *)(MMAP_RCM);
+
+       udelay(1000);
+
+       rcm->rcr = RCM_RCR_SOFTRST;
+
+       /* we don't return! */
+       return 0;
+};
+
+int checkcpu(void)
+{
+       char buf[32];
+
+       printf("CPU:   Freescale Coldfire MCF5275 at %s MHz\n",
+                       strmhz(buf, CONFIG_SYS_CLK));
+       return 0;
+};
+
+
+#if defined(CONFIG_WATCHDOG)
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+       volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+       wdt->wsr = 0x5555;
+       wdt->wsr = 0xAAAA;
+}
+
+int watchdog_disable(void)
+{
+       volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+
+       wdt->wsr = 0x5555; /* reset watchdog counter */
+       wdt->wsr = 0xAAAA;
+       wdt->wcr = 0;   /* disable watchdog timer */
+
+       puts("WATCHDOG:disabled\n");
+       return (0);
+}
+
+int watchdog_init(void)
+{
+       volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+
+       wdt->wcr = 0;   /* disable watchdog */
+
+       /* set timeout and enable watchdog */
+       wdt->wmr =
+               ((CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000)) - 1;
+       wdt->wsr = 0x5555; /* reset watchdog counter */
+       wdt->wsr = 0xAAAA;
+
+       puts("WATCHDOG:enabled\n");
+       return (0);
+}
+#endif                         /* #ifdef CONFIG_WATCHDOG */
+
+#endif                         /* #ifdef CONFIG_M5275 */
+
 #ifdef CONFIG_M5282
 int checkcpu(void)
 {
@@ -205,13 +344,13 @@ int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 };
 #endif
 
-#ifdef CONFIG_M5249            /* test-only: todo... */
+#ifdef CONFIG_M5249
 int checkcpu(void)
 {
        char buf[32];
 
        printf("CPU:   Freescale Coldfire MCF5249 at %s MHz\n",
-              strmhz(buf, CFG_CLK));
+              strmhz(buf, CONFIG_SYS_CLK));
        return 0;
 }
 
@@ -225,3 +364,45 @@ int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
        return 0;
 };
 #endif
+
+#ifdef CONFIG_M5253
+int checkcpu(void)
+{
+       char buf[32];
+
+       unsigned char resetsource = mbar_readLong(SIM_RSR);
+       printf("CPU:   Freescale Coldfire MCF5253 at %s MHz\n",
+              strmhz(buf, CONFIG_SYS_CLK));
+
+       if ((resetsource & SIM_RSR_HRST) || (resetsource & SIM_RSR_SWTR)) {
+               printf("Reset:%s%s\n",
+                      (resetsource & SIM_RSR_HRST) ? " Hardware/ System Reset"
+                      : "",
+                      (resetsource & SIM_RSR_SWTR) ? " Software Watchdog" :
+                      "");
+       }
+       return 0;
+}
+
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
+       /* enable watchdog, set timeout to 0 and wait */
+       mbar_writeByte(SIM_SYPCR, 0xc0);
+       while (1) ;
+
+       /* we don't return! */
+       return 0;
+};
+#endif
+
+#if defined(CONFIG_MCFFEC)
+/* Default initializations for MCFFEC controllers.  To override,
+ * create a board-specific function called:
+ *     int board_eth_init(bd_t *bis)
+ */
+
+int cpu_eth_init(bd_t *bis)
+{
+       return mcffec_initialize(bis);
+}
+#endif