* but idependent of implementation */
#include <config.h>
-
-#ifdef CONFIG_SC520
-
#include <common.h>
#include <config.h>
#include <pci.h>
-#include <ssi.h>
+#ifdef CONFIG_SC520_SSI
+#include <asm/ic/ssi.h>
+#endif
#include <asm/io.h>
#include <asm/pci.h>
#include <asm/ic/sc520.h>
write_mmcr_word(SC520_HBCTL,0x04); /* enable posted-writes */
- if (CFG_SC520_HIGH_SPEED) {
+ if (CONFIG_SYS_SC520_HIGH_SPEED) {
write_mmcr_byte(SC520_CPUCTL, 0x2); /* set it to 133 MHz and write back */
gd->cpu_clk = 133000000;
printf("## CPU Speed set to 133MHz\n");
u32 dram_present=0;
u32 dram_ctrl;
-
+#ifdef CONFIG_SYS_SDRAM_DRCTMCTL
+ /* these memory control registers are set up in the assember part,
+ * in sc520_asm.S, during 'mem_init'. If we muck with them here,
+ * after we are running a stack in RAM, we have troubles. Besides,
+ * these refresh and delay values are better ? simply specified
+ * outright in the include/configs/{cfg} file since the HW designer
+ * simply dictates it.
+ */
+#else
int val;
- int cas_precharge_delay = CFG_SDRAM_PRECHARGE_DELAY;
- int refresh_rate = CFG_SDRAM_REFRESH_RATE;
- int ras_cas_delay = CFG_SDRAM_RAS_CAS_DELAY;
+ int cas_precharge_delay = CONFIG_SYS_SDRAM_PRECHARGE_DELAY;
+ int refresh_rate = CONFIG_SYS_SDRAM_REFRESH_RATE;
+ int ras_cas_delay = CONFIG_SYS_SDRAM_RAS_CAS_DELAY;
/* set SDRAM speed here */
} else {
val = 3; /* 62.4us */
}
+
write_mmcr_byte(SC520_DRCCTL, (read_mmcr_byte(SC520_DRCCTL) & 0xcf) | (val<<4));
val = read_mmcr_byte(SC520_DRCTMCTL);
val |= 1;
}
write_mmcr_byte(SC520_DRCTMCTL, val);
-
+#endif
/* We read-back the configuration of the dram
* controller that the assembly code wrote */
dram_ctrl = read_mmcr_long(SC520_DRCBENDADR);
-
bd->bi_dram[0].start = 0;
if (dram_ctrl & 0x80) {
/* bank 0 enabled */
{
int i;
-# if 0
+# if 1
printf("set_irq(): map INT%c to IRQ%d\n", pci_pin + 'A', irq);
#endif
if (irq < 0 || irq > 15) {
#endif
-#ifdef CFG_TIMER_SC520
+#ifdef CONFIG_SYS_TIMER_SC520
void reset_timer(void)
ulong get_timer(ulong base)
{
/* fixme: 30 or 33 */
- return read_mmcr_word(SC520_GPTMR0CNT) / 33;
+ return read_mmcr_word(SC520_GPTMR0CNT) / 33;
}
void set_timer(ulong t)
return read_mmcr_byte(SC520_SSIRCV);
}
-#endif /* CONFIG_SC520 */
+#ifdef CONFIG_SYS_RESET_SC520
+void reset_cpu(ulong addr)
+{
+ printf("Resetting using SC520 MMCR\n");
+ /* Write a '1' to the SYS_RST of the RESCFG MMCR */
+ write_mmcr_word(SC520_RESCFG, 0x0001);
+
+ /* NOTREACHED */
+}
+#endif