/*
+ * (C) Copyright 2008
+ * Graeme Russ, graeme.russ@gmail.com.
+ *
* (C) Copyright 2002
* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
*
*/
#include <common.h>
-#include <malloc.h>
-#include <asm/io.h>
-#include <asm/i8259.h>
-#include <asm/ibmpc.h>
+#include <asm/interrupt.h>
+#define DECLARE_INTERRUPT(x) \
+ ".globl irq_"#x"\n" \
+ ".hidden irq_"#x"\n" \
+ ".type irq_"#x", @function\n" \
+ "irq_"#x":\n" \
+ "pushl %ebp\n" \
+ "movl %esp,%ebp\n" \
+ "pusha\n" \
+ "pushl $"#x"\n" \
+ "jmp irq_common_entry\n"
struct idt_entry {
u16 base_low;
u16 base_high;
} __attribute__ ((packed));
+struct desc_ptr {
+ unsigned short size;
+ unsigned long address;
+ unsigned short segment;
+} __attribute__((packed));
struct idt_entry idt[256];
+struct desc_ptr idt_ptr;
-#define MAX_IRQ 16
-
-typedef struct irq_handler {
- struct irq_handler *next;
- interrupt_handler_t* isr_func;
- void *isr_data;
-} irq_handler_t;
-
-#define IRQ_DISABLED 1
-
-typedef struct {
- irq_handler_t *handler;
- unsigned long status;
-} irq_desc_t;
-
-static irq_desc_t irq_table[MAX_IRQ];
-
-asm ("irq_return:\n"
- " addl $4, %esp\n"
- " popa\n"
- " iret\n");
-
-asm ("exp_return:\n"
- " addl $12, %esp\n"
- " pop %esp\n"
- " popa\n"
- " iret\n");
-
-char exception_stack[4096];
-
-#define DECLARE_INTERRUPT(x) \
- asm(".globl irq_"#x"\n" \
- "irq_"#x":\n" \
- "pusha \n" \
- "pushl $"#x"\n" \
- "pushl $irq_return\n" \
- "jmp do_irq\n"); \
- void __attribute__ ((regparm(0))) irq_##x(void)
-
-#define DECLARE_EXCEPTION(x, f) \
- asm(".globl exp_"#x"\n" \
- "exp_"#x":\n" \
- "pusha \n" \
- "movl %esp, %ebx\n" \
- "movl $exception_stack, %eax\n" \
- "movl %eax, %esp \n" \
- "pushl %ebx\n" \
- "movl 32(%esp), %ebx\n" \
- "xorl %edx, %edx\n" \
- "movw 36(%esp), %dx\n" \
- "pushl %edx\n" \
- "pushl %ebx\n" \
- "pushl $"#x"\n" \
- "pushl $exp_return\n" \
- "jmp "#f"\n"); \
- void __attribute__ ((regparm(0))) exp_##x(void)
-
-DECLARE_EXCEPTION(0, divide_exception_entry); /* Divide exception */
-DECLARE_EXCEPTION(1, debug_exception_entry); /* Debug exception */
-DECLARE_EXCEPTION(2, nmi_entry); /* NMI */
-DECLARE_EXCEPTION(3, unknown_exception_entry); /* Breakpoint/Coprocessor Error */
-DECLARE_EXCEPTION(4, unknown_exception_entry); /* Overflow */
-DECLARE_EXCEPTION(5, unknown_exception_entry); /* Bounds */
-DECLARE_EXCEPTION(6, invalid_instruction_entry); /* Invalid instruction */
-DECLARE_EXCEPTION(7, unknown_exception_entry); /* Device not present */
-DECLARE_EXCEPTION(8, double_fault_entry); /* Double fault */
-DECLARE_EXCEPTION(9, unknown_exception_entry); /* Co-processor segment overrun */
-DECLARE_EXCEPTION(10, invalid_tss_exception_entry);/* Invalid TSS */
-DECLARE_EXCEPTION(11, seg_fault_entry); /* Segment not present */
-DECLARE_EXCEPTION(12, stack_fault_entry); /* Stack overflow */
-DECLARE_EXCEPTION(13, gpf_entry); /* GPF */
-DECLARE_EXCEPTION(14, page_fault_entry); /* PF */
-DECLARE_EXCEPTION(15, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(16, fp_exception_entry); /* Floating point */
-DECLARE_EXCEPTION(17, alignment_check_entry); /* alignment check */
-DECLARE_EXCEPTION(18, machine_check_entry); /* machine check */
-DECLARE_EXCEPTION(19, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(20, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(21, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(22, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(23, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(24, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(25, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(26, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(27, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(28, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(29, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(30, unknown_exception_entry); /* Reserved */
-DECLARE_EXCEPTION(31, unknown_exception_entry); /* Reserved */
-
-DECLARE_INTERRUPT(0);
-DECLARE_INTERRUPT(1);
-DECLARE_INTERRUPT(3);
-DECLARE_INTERRUPT(4);
-DECLARE_INTERRUPT(5);
-DECLARE_INTERRUPT(6);
-DECLARE_INTERRUPT(7);
-DECLARE_INTERRUPT(8);
-DECLARE_INTERRUPT(9);
-DECLARE_INTERRUPT(10);
-DECLARE_INTERRUPT(11);
-DECLARE_INTERRUPT(12);
-DECLARE_INTERRUPT(13);
-DECLARE_INTERRUPT(14);
-DECLARE_INTERRUPT(15);
-
-void __attribute__ ((regparm(0))) default_isr(void);
-asm ("default_isr: iret\n");
-
-void disable_irq(int irq)
-{
- if (irq >= MAX_IRQ) {
- return;
- }
- irq_table[irq].status |= IRQ_DISABLED;
-
-}
-
-void enable_irq(int irq)
-{
- if (irq >= MAX_IRQ) {
- return;
- }
- irq_table[irq].status &= ~IRQ_DISABLED;
-}
-
-/* masks one specific IRQ in the PIC */
-static void unmask_irq(int irq)
-{
- int imr_port;
-
- if (irq >= MAX_IRQ) {
- return;
- }
- if (irq > 7) {
- imr_port = SLAVE_PIC + IMR;
- } else {
- imr_port = MASTER_PIC + IMR;
- }
-
- outb(inb(imr_port)&~(1<<(irq&7)), imr_port);
-}
-
-
-/* unmasks one specific IRQ in the PIC */
-static void mask_irq(int irq)
-{
- int imr_port;
-
- if (irq >= MAX_IRQ) {
- return;
- }
- if (irq > 7) {
- imr_port = SLAVE_PIC + IMR;
- } else {
- imr_port = MASTER_PIC + IMR;
- }
-
- outb(inb(imr_port)|(1<<(irq&7)), imr_port);
-}
-
-
-/* issue a Specific End Of Interrupt instruciton */
-static void specific_eoi(int irq)
-{
- /* If it is on the slave PIC this have to be performed on
- * both the master and the slave PICs */
- if (irq > 7) {
- outb(OCW2_SEOI|(irq&7), SLAVE_PIC + OCW2);
- irq = SEOI_IR2; /* also do IR2 on master */
- }
- outb(OCW2_SEOI|irq, MASTER_PIC + OCW2);
-}
-
-void __attribute__ ((regparm(0))) do_irq(int irq)
-{
-
- mask_irq(irq);
-
- if (irq_table[irq].status & IRQ_DISABLED) {
- unmask_irq(irq);
- specific_eoi(irq);
- return;
- }
-
-
- if (NULL != irq_table[irq].handler) {
- irq_handler_t *handler;
- for (handler = irq_table[irq].handler;
- NULL!= handler; handler = handler->next) {
- handler->isr_func(handler->isr_data);
- }
- } else {
- if ((irq & 7) != 7) {
- printf("Spurious irq %d\n", irq);
- }
- }
- unmask_irq(irq);
- specific_eoi(irq);
-}
-
-
-void __attribute__ ((regparm(0))) unknown_exception_entry(int cause, int ip, int seg)
-{
- printf("Unknown Exception %d at %04x:%08x\n", cause, seg, ip);
-}
-
-void __attribute__ ((regparm(0))) divide_exception_entry(int cause, int ip, int seg)
-{
- printf("Divide Error (Division by zero) at %04x:%08x\n", seg, ip);
- while(1);
-}
-
-void __attribute__ ((regparm(0))) debug_exception_entry(int cause, int ip, int seg)
-{
- printf("Debug Interrupt (Single step) at %04x:%08x\n", seg, ip);
-}
-
-void __attribute__ ((regparm(0))) nmi_entry(int cause, int ip, int seg)
+static inline void load_idt(const struct desc_ptr *dtr)
{
- printf("NMI Interrupt at %04x:%08x\n", seg, ip);
+ asm volatile("cs lidt %0"::"m" (*dtr));
}
-void __attribute__ ((regparm(0))) invalid_instruction_entry(int cause, int ip, int seg)
+void set_vector(u8 intnum, void *routine)
{
- printf("Invalid Instruction at %04x:%08x\n", seg, ip);
- while(1);
+ idt[intnum].base_high = (u16)((u32)(routine) >> 16);
+ idt[intnum].base_low = (u16)((u32)(routine) & 0xffff);
}
-void __attribute__ ((regparm(0))) double_fault_entry(int cause, int ip, int seg)
-{
- printf("Double fault at %04x:%08x\n", seg, ip);
- while(1);
-}
-
-void __attribute__ ((regparm(0))) invalid_tss_exception_entry(int cause, int ip, int seg)
-{
- printf("Invalid TSS at %04x:%08x\n", seg, ip);
-}
-
-void __attribute__ ((regparm(0))) seg_fault_entry(int cause, int ip, int seg)
-{
- printf("Segmentation fault at %04x:%08x\n", seg, ip);
- while(1);
-}
+void irq_0(void);
+void irq_1(void);
-void __attribute__ ((regparm(0))) stack_fault_entry(int cause, int ip, int seg)
-{
- printf("Stack fault at %04x:%08x\n", seg, ip);
- while(1);
-}
-
-void __attribute__ ((regparm(0))) gpf_entry(int cause, int ip, int seg)
-{
- printf("General protection fault at %04x:%08x\n", seg, ip);
-}
-
-void __attribute__ ((regparm(0))) page_fault_entry(int cause, int ip, int seg)
-{
- printf("Page fault at %04x:%08x\n", seg, ip);
- while(1);
-}
-
-void __attribute__ ((regparm(0))) fp_exception_entry(int cause, int ip, int seg)
-{
- printf("Floating point exception at %04x:%08x\n", seg, ip);
-}
-
-void __attribute__ ((regparm(0))) alignment_check_entry(int cause, int ip, int seg)
-{
- printf("Alignment check at %04x:%08x\n", seg, ip);
-}
-
-void __attribute__ ((regparm(0))) machine_check_entry(int cause, int ip, int seg)
-{
- printf("Machine check exception at %04x:%08x\n", seg, ip);
-}
-
-
-void irq_install_handler(int ino, interrupt_handler_t *func, void *pdata)
-{
- int status;
-
- if (ino>MAX_IRQ) {
- return;
- }
-
- if (NULL != irq_table[ino].handler) {
- return;
- }
-
- status = disable_interrupts();
- irq_table[ino].handler = malloc(sizeof(irq_handler_t));
- if (NULL == irq_table[ino].handler) {
- return;
- }
-
- memset(irq_table[ino].handler, 0, sizeof(irq_handler_t));
-
- irq_table[ino].handler->isr_func = func;
- irq_table[ino].handler->isr_data = pdata;
- if (status) {
- enable_interrupts();
- }
-
- unmask_irq(ino);
-
- return;
-}
-
-void irq_free_handler(int ino)
-{
- int status;
- if (ino>MAX_IRQ) {
- return;
- }
-
- status = disable_interrupts();
- mask_irq(ino);
- if (NULL == irq_table[ino].handler) {
- return;
- }
- free(irq_table[ino].handler);
- irq_table[ino].handler=NULL;
- if (status) {
- enable_interrupts();
- }
- return;
-}
-
-
-asm ("idt_ptr:\n"
- ".word 0x800\n" /* size of the table 8*256 bytes */
- ".long idt\n" /* offset */
- ".word 0x18\n");/* data segment */
-
-static void set_vector(int intnum, void *routine)
-{
- idt[intnum].base_high = (u16)((u32)(routine)>>16);
- idt[intnum].base_low = (u16)((u32)(routine)&0xffff);
-}
-
-
-int interrupt_init(void)
+int cpu_init_interrupts(void)
{
int i;
+ int irq_entry_size = irq_1 - irq_0;
+ void *irq_entry = (void *)irq_0;
+
/* Just in case... */
disable_interrupts();
- /* Initialize the IDT and stuff */
-
-
- memset(irq_table, 0, sizeof(irq_table));
-
/* Setup the IDT */
for (i=0;i<256;i++) {
idt[i].access = 0x8e;
idt[i].res = 0;
idt[i].selector = 0x10;
- set_vector(i, default_isr);
+ set_vector(i, irq_entry);
+ irq_entry += irq_entry_size;
}
- asm ("cs lidt idt_ptr\n");
-
- /* Setup exceptions */
- set_vector(0x00, exp_0);
- set_vector(0x01, exp_1);
- set_vector(0x02, exp_2);
- set_vector(0x03, exp_3);
- set_vector(0x04, exp_4);
- set_vector(0x05, exp_5);
- set_vector(0x06, exp_6);
- set_vector(0x07, exp_7);
- set_vector(0x08, exp_8);
- set_vector(0x09, exp_9);
- set_vector(0x0a, exp_10);
- set_vector(0x0b, exp_11);
- set_vector(0x0c, exp_12);
- set_vector(0x0d, exp_13);
- set_vector(0x0e, exp_14);
- set_vector(0x0f, exp_15);
- set_vector(0x10, exp_16);
- set_vector(0x11, exp_17);
- set_vector(0x12, exp_18);
- set_vector(0x13, exp_19);
- set_vector(0x14, exp_20);
- set_vector(0x15, exp_21);
- set_vector(0x16, exp_22);
- set_vector(0x17, exp_23);
- set_vector(0x18, exp_24);
- set_vector(0x19, exp_25);
- set_vector(0x1a, exp_26);
- set_vector(0x1b, exp_27);
- set_vector(0x1c, exp_28);
- set_vector(0x1d, exp_29);
- set_vector(0x1e, exp_30);
- set_vector(0x1f, exp_31);
-
-
- /* Setup interrupts */
- set_vector(0x20, irq_0);
- set_vector(0x21, irq_1);
- set_vector(0x23, irq_3);
- set_vector(0x24, irq_4);
- set_vector(0x25, irq_5);
- set_vector(0x26, irq_6);
- set_vector(0x27, irq_7);
- set_vector(0x28, irq_8);
- set_vector(0x29, irq_9);
- set_vector(0x2a, irq_10);
- set_vector(0x2b, irq_11);
- set_vector(0x2c, irq_12);
- set_vector(0x2d, irq_13);
- set_vector(0x2e, irq_14);
- set_vector(0x2f, irq_15);
- /* vectors 0x30-0x3f are reserved for irq 16-31 */
-
+ idt_ptr.size = 256 * 8;
+ idt_ptr.address = (unsigned long) idt;
+ idt_ptr.segment = 0x18;
- /* Mask all interrupts */
- outb(0xff, MASTER_PIC + IMR);
- outb(0xff, SLAVE_PIC + IMR);
-
- /* Master PIC */
- outb(ICW1_SEL|ICW1_EICW4, MASTER_PIC + ICW1);
- outb(0x20, MASTER_PIC + ICW2); /* Place master PIC interrupts at INT20 */
- outb(IR2, MASTER_PIC + ICW3); /* ICW3, One slevc PIC is present */
- outb(ICW4_PM, MASTER_PIC + ICW4);
-
- for (i=0;i<8;i++) {
- outb(OCW2_SEOI|i, MASTER_PIC + OCW2);
- }
-
- /* Slave PIC */
- outb(ICW1_SEL|ICW1_EICW4, SLAVE_PIC + ICW1);
- outb(0x28, SLAVE_PIC + ICW2); /* Place slave PIC interrupts at INT28 */
- outb(0x02, SLAVE_PIC + ICW3); /* Slave ID */
- outb(ICW4_PM, SLAVE_PIC + ICW4);
-
- for (i=0;i<8;i++) {
- outb(OCW2_SEOI|i, SLAVE_PIC + OCW2);
- }
-
-
- /* enable cascade interrerupt */
- outb(0xfb, MASTER_PIC + IMR);
- outb(0xff, SLAVE_PIC + IMR);
+ load_idt(&idt_ptr);
/* It is now safe to enable interrupts */
enable_interrupts();
return 0;
}
+void __do_irq(int irq)
+{
+ printf("Unhandled IRQ : %d\n", irq);
+}
+void do_irq(int irq) __attribute__((weak, alias("__do_irq")));
+
void enable_interrupts(void)
{
asm("sti\n");
return (flags&0x200); /* IE flags is bit 9 */
}
-
-#ifdef CONFIG_SYS_RESET_GENERIC
-
-void __attribute__ ((regparm(0))) generate_gpf(void);
-asm(".globl generate_gpf\n"
- "generate_gpf:\n"
- "ljmp $0x70, $0x47114711\n"); /* segment 0x70 is an arbitrary segment which does not
- * exist */
-void reset_cpu(ulong addr)
+/* IRQ Low-Level Service Routine */
+__isr__ irq_llsr(int ip, int seg, int irq)
{
- set_vector(13, generate_gpf); /* general protection fault handler */
- set_vector(8, generate_gpf); /* double fault handler */
- generate_gpf(); /* start the show */
+ /*
+ * For detailed description of each exception, refer to:
+ * Intel® 64 and IA-32 Architectures Software Developer's Manual
+ * Volume 1: Basic Architecture
+ * Order Number: 253665-029US, November 2008
+ * Table 6-1. Exceptions and Interrupts
+ */
+ switch (irq) {
+ case 0x00:
+ printf("Divide Error (Division by zero) at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x01:
+ printf("Debug Interrupt (Single step) at %04x:%08x\n", seg, ip);
+ break;
+ case 0x02:
+ printf("NMI Interrupt at %04x:%08x\n", seg, ip);
+ break;
+ case 0x03:
+ printf("Breakpoint at %04x:%08x\n", seg, ip);
+ break;
+ case 0x04:
+ printf("Overflow at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x05:
+ printf("BOUND Range Exceeded at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x06:
+ printf("Invalid Opcode (UnDefined Opcode) at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x07:
+ printf("Device Not Available (No Math Coprocessor) at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x08:
+ printf("Double fault at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x09:
+ printf("Co-processor segment overrun at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x0a:
+ printf("Invalid TSS at %04x:%08x\n", seg, ip);
+ break;
+ case 0x0b:
+ printf("Segment Not Present at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x0c:
+ printf("Stack Segment Fault at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x0d:
+ printf("General Protection at %04x:%08x\n", seg, ip);
+ break;
+ case 0x0e:
+ printf("Page fault at %04x:%08x\n", seg, ip);
+ while(1);
+ break;
+ case 0x0f:
+ printf("Floating-Point Error (Math Fault) at %04x:%08x\n", seg, ip);
+ break;
+ case 0x10:
+ printf("Alignment check at %04x:%08x\n", seg, ip);
+ break;
+ case 0x11:
+ printf("Machine Check at %04x:%08x\n", seg, ip);
+ break;
+ case 0x12:
+ printf("SIMD Floating-Point Exception at %04x:%08x\n", seg, ip);
+ break;
+ case 0x13:
+ case 0x14:
+ case 0x15:
+ case 0x16:
+ case 0x17:
+ case 0x18:
+ case 0x19:
+ case 0x1a:
+ case 0x1b:
+ case 0x1c:
+ case 0x1d:
+ case 0x1e:
+ case 0x1f:
+ printf("Reserved Exception %d at %04x:%08x\n", irq, seg, ip);
+ break;
+
+ default:
+ /* Hardware or User IRQ */
+ do_irq(irq);
+ }
}
-#endif
+
+/*
+ * OK - This looks really horrible, but it serves a purpose - It helps create
+ * fully relocatable code.
+ * - The call to irq_llsr will be a relative jump
+ * - The IRQ entries will be guaranteed to be in order
+ * It's a bit annoying that we need to waste 3 bytes per interrupt entry
+ * (total of 768 code bytes), but we MUST create a Stack Frame and this is
+ * the easiest way I could do it. Maybe it can be made better later.
+ */
+asm(".globl irq_common_entry\n" \
+ ".hidden irq_common_entry\n" \
+ ".type irq_common_entry, @function\n" \
+ "irq_common_entry:\n" \
+ "pushl $0\n" \
+ "pushl $0\n" \
+ "call irq_llsr\n" \
+ "popl %eax\n" \
+ "popl %eax\n" \
+ "popl %eax\n" \
+ "popa\n" \
+ "leave\n"\
+ "iret\n" \
+ DECLARE_INTERRUPT(0) \
+ DECLARE_INTERRUPT(1) \
+ DECLARE_INTERRUPT(2) \
+ DECLARE_INTERRUPT(3) \
+ DECLARE_INTERRUPT(4) \
+ DECLARE_INTERRUPT(5) \
+ DECLARE_INTERRUPT(6) \
+ DECLARE_INTERRUPT(7) \
+ DECLARE_INTERRUPT(8) \
+ DECLARE_INTERRUPT(9) \
+ DECLARE_INTERRUPT(10) \
+ DECLARE_INTERRUPT(11) \
+ DECLARE_INTERRUPT(12) \
+ DECLARE_INTERRUPT(13) \
+ DECLARE_INTERRUPT(14) \
+ DECLARE_INTERRUPT(15) \
+ DECLARE_INTERRUPT(16) \
+ DECLARE_INTERRUPT(17) \
+ DECLARE_INTERRUPT(18) \
+ DECLARE_INTERRUPT(19) \
+ DECLARE_INTERRUPT(20) \
+ DECLARE_INTERRUPT(21) \
+ DECLARE_INTERRUPT(22) \
+ DECLARE_INTERRUPT(23) \
+ DECLARE_INTERRUPT(24) \
+ DECLARE_INTERRUPT(25) \
+ DECLARE_INTERRUPT(26) \
+ DECLARE_INTERRUPT(27) \
+ DECLARE_INTERRUPT(28) \
+ DECLARE_INTERRUPT(29) \
+ DECLARE_INTERRUPT(30) \
+ DECLARE_INTERRUPT(31) \
+ DECLARE_INTERRUPT(32) \
+ DECLARE_INTERRUPT(33) \
+ DECLARE_INTERRUPT(34) \
+ DECLARE_INTERRUPT(35) \
+ DECLARE_INTERRUPT(36) \
+ DECLARE_INTERRUPT(37) \
+ DECLARE_INTERRUPT(38) \
+ DECLARE_INTERRUPT(39) \
+ DECLARE_INTERRUPT(40) \
+ DECLARE_INTERRUPT(41) \
+ DECLARE_INTERRUPT(42) \
+ DECLARE_INTERRUPT(43) \
+ DECLARE_INTERRUPT(44) \
+ DECLARE_INTERRUPT(45) \
+ DECLARE_INTERRUPT(46) \
+ DECLARE_INTERRUPT(47) \
+ DECLARE_INTERRUPT(48) \
+ DECLARE_INTERRUPT(49) \
+ DECLARE_INTERRUPT(50) \
+ DECLARE_INTERRUPT(51) \
+ DECLARE_INTERRUPT(52) \
+ DECLARE_INTERRUPT(53) \
+ DECLARE_INTERRUPT(54) \
+ DECLARE_INTERRUPT(55) \
+ DECLARE_INTERRUPT(56) \
+ DECLARE_INTERRUPT(57) \
+ DECLARE_INTERRUPT(58) \
+ DECLARE_INTERRUPT(59) \
+ DECLARE_INTERRUPT(60) \
+ DECLARE_INTERRUPT(61) \
+ DECLARE_INTERRUPT(62) \
+ DECLARE_INTERRUPT(63) \
+ DECLARE_INTERRUPT(64) \
+ DECLARE_INTERRUPT(65) \
+ DECLARE_INTERRUPT(66) \
+ DECLARE_INTERRUPT(67) \
+ DECLARE_INTERRUPT(68) \
+ DECLARE_INTERRUPT(69) \
+ DECLARE_INTERRUPT(70) \
+ DECLARE_INTERRUPT(71) \
+ DECLARE_INTERRUPT(72) \
+ DECLARE_INTERRUPT(73) \
+ DECLARE_INTERRUPT(74) \
+ DECLARE_INTERRUPT(75) \
+ DECLARE_INTERRUPT(76) \
+ DECLARE_INTERRUPT(77) \
+ DECLARE_INTERRUPT(78) \
+ DECLARE_INTERRUPT(79) \
+ DECLARE_INTERRUPT(80) \
+ DECLARE_INTERRUPT(81) \
+ DECLARE_INTERRUPT(82) \
+ DECLARE_INTERRUPT(83) \
+ DECLARE_INTERRUPT(84) \
+ DECLARE_INTERRUPT(85) \
+ DECLARE_INTERRUPT(86) \
+ DECLARE_INTERRUPT(87) \
+ DECLARE_INTERRUPT(88) \
+ DECLARE_INTERRUPT(89) \
+ DECLARE_INTERRUPT(90) \
+ DECLARE_INTERRUPT(91) \
+ DECLARE_INTERRUPT(92) \
+ DECLARE_INTERRUPT(93) \
+ DECLARE_INTERRUPT(94) \
+ DECLARE_INTERRUPT(95) \
+ DECLARE_INTERRUPT(97) \
+ DECLARE_INTERRUPT(96) \
+ DECLARE_INTERRUPT(98) \
+ DECLARE_INTERRUPT(99) \
+ DECLARE_INTERRUPT(100) \
+ DECLARE_INTERRUPT(101) \
+ DECLARE_INTERRUPT(102) \
+ DECLARE_INTERRUPT(103) \
+ DECLARE_INTERRUPT(104) \
+ DECLARE_INTERRUPT(105) \
+ DECLARE_INTERRUPT(106) \
+ DECLARE_INTERRUPT(107) \
+ DECLARE_INTERRUPT(108) \
+ DECLARE_INTERRUPT(109) \
+ DECLARE_INTERRUPT(110) \
+ DECLARE_INTERRUPT(111) \
+ DECLARE_INTERRUPT(112) \
+ DECLARE_INTERRUPT(113) \
+ DECLARE_INTERRUPT(114) \
+ DECLARE_INTERRUPT(115) \
+ DECLARE_INTERRUPT(116) \
+ DECLARE_INTERRUPT(117) \
+ DECLARE_INTERRUPT(118) \
+ DECLARE_INTERRUPT(119) \
+ DECLARE_INTERRUPT(120) \
+ DECLARE_INTERRUPT(121) \
+ DECLARE_INTERRUPT(122) \
+ DECLARE_INTERRUPT(123) \
+ DECLARE_INTERRUPT(124) \
+ DECLARE_INTERRUPT(125) \
+ DECLARE_INTERRUPT(126) \
+ DECLARE_INTERRUPT(127) \
+ DECLARE_INTERRUPT(128) \
+ DECLARE_INTERRUPT(129) \
+ DECLARE_INTERRUPT(130) \
+ DECLARE_INTERRUPT(131) \
+ DECLARE_INTERRUPT(132) \
+ DECLARE_INTERRUPT(133) \
+ DECLARE_INTERRUPT(134) \
+ DECLARE_INTERRUPT(135) \
+ DECLARE_INTERRUPT(136) \
+ DECLARE_INTERRUPT(137) \
+ DECLARE_INTERRUPT(138) \
+ DECLARE_INTERRUPT(139) \
+ DECLARE_INTERRUPT(140) \
+ DECLARE_INTERRUPT(141) \
+ DECLARE_INTERRUPT(142) \
+ DECLARE_INTERRUPT(143) \
+ DECLARE_INTERRUPT(144) \
+ DECLARE_INTERRUPT(145) \
+ DECLARE_INTERRUPT(146) \
+ DECLARE_INTERRUPT(147) \
+ DECLARE_INTERRUPT(148) \
+ DECLARE_INTERRUPT(149) \
+ DECLARE_INTERRUPT(150) \
+ DECLARE_INTERRUPT(151) \
+ DECLARE_INTERRUPT(152) \
+ DECLARE_INTERRUPT(153) \
+ DECLARE_INTERRUPT(154) \
+ DECLARE_INTERRUPT(155) \
+ DECLARE_INTERRUPT(156) \
+ DECLARE_INTERRUPT(157) \
+ DECLARE_INTERRUPT(158) \
+ DECLARE_INTERRUPT(159) \
+ DECLARE_INTERRUPT(160) \
+ DECLARE_INTERRUPT(161) \
+ DECLARE_INTERRUPT(162) \
+ DECLARE_INTERRUPT(163) \
+ DECLARE_INTERRUPT(164) \
+ DECLARE_INTERRUPT(165) \
+ DECLARE_INTERRUPT(166) \
+ DECLARE_INTERRUPT(167) \
+ DECLARE_INTERRUPT(168) \
+ DECLARE_INTERRUPT(169) \
+ DECLARE_INTERRUPT(170) \
+ DECLARE_INTERRUPT(171) \
+ DECLARE_INTERRUPT(172) \
+ DECLARE_INTERRUPT(173) \
+ DECLARE_INTERRUPT(174) \
+ DECLARE_INTERRUPT(175) \
+ DECLARE_INTERRUPT(176) \
+ DECLARE_INTERRUPT(177) \
+ DECLARE_INTERRUPT(178) \
+ DECLARE_INTERRUPT(179) \
+ DECLARE_INTERRUPT(180) \
+ DECLARE_INTERRUPT(181) \
+ DECLARE_INTERRUPT(182) \
+ DECLARE_INTERRUPT(183) \
+ DECLARE_INTERRUPT(184) \
+ DECLARE_INTERRUPT(185) \
+ DECLARE_INTERRUPT(186) \
+ DECLARE_INTERRUPT(187) \
+ DECLARE_INTERRUPT(188) \
+ DECLARE_INTERRUPT(189) \
+ DECLARE_INTERRUPT(190) \
+ DECLARE_INTERRUPT(191) \
+ DECLARE_INTERRUPT(192) \
+ DECLARE_INTERRUPT(193) \
+ DECLARE_INTERRUPT(194) \
+ DECLARE_INTERRUPT(195) \
+ DECLARE_INTERRUPT(196) \
+ DECLARE_INTERRUPT(197) \
+ DECLARE_INTERRUPT(198) \
+ DECLARE_INTERRUPT(199) \
+ DECLARE_INTERRUPT(200) \
+ DECLARE_INTERRUPT(201) \
+ DECLARE_INTERRUPT(202) \
+ DECLARE_INTERRUPT(203) \
+ DECLARE_INTERRUPT(204) \
+ DECLARE_INTERRUPT(205) \
+ DECLARE_INTERRUPT(206) \
+ DECLARE_INTERRUPT(207) \
+ DECLARE_INTERRUPT(208) \
+ DECLARE_INTERRUPT(209) \
+ DECLARE_INTERRUPT(210) \
+ DECLARE_INTERRUPT(211) \
+ DECLARE_INTERRUPT(212) \
+ DECLARE_INTERRUPT(213) \
+ DECLARE_INTERRUPT(214) \
+ DECLARE_INTERRUPT(215) \
+ DECLARE_INTERRUPT(216) \
+ DECLARE_INTERRUPT(217) \
+ DECLARE_INTERRUPT(218) \
+ DECLARE_INTERRUPT(219) \
+ DECLARE_INTERRUPT(220) \
+ DECLARE_INTERRUPT(221) \
+ DECLARE_INTERRUPT(222) \
+ DECLARE_INTERRUPT(223) \
+ DECLARE_INTERRUPT(224) \
+ DECLARE_INTERRUPT(225) \
+ DECLARE_INTERRUPT(226) \
+ DECLARE_INTERRUPT(227) \
+ DECLARE_INTERRUPT(228) \
+ DECLARE_INTERRUPT(229) \
+ DECLARE_INTERRUPT(230) \
+ DECLARE_INTERRUPT(231) \
+ DECLARE_INTERRUPT(232) \
+ DECLARE_INTERRUPT(233) \
+ DECLARE_INTERRUPT(234) \
+ DECLARE_INTERRUPT(235) \
+ DECLARE_INTERRUPT(236) \
+ DECLARE_INTERRUPT(237) \
+ DECLARE_INTERRUPT(238) \
+ DECLARE_INTERRUPT(239) \
+ DECLARE_INTERRUPT(240) \
+ DECLARE_INTERRUPT(241) \
+ DECLARE_INTERRUPT(242) \
+ DECLARE_INTERRUPT(243) \
+ DECLARE_INTERRUPT(244) \
+ DECLARE_INTERRUPT(245) \
+ DECLARE_INTERRUPT(246) \
+ DECLARE_INTERRUPT(247) \
+ DECLARE_INTERRUPT(248) \
+ DECLARE_INTERRUPT(249) \
+ DECLARE_INTERRUPT(250) \
+ DECLARE_INTERRUPT(251) \
+ DECLARE_INTERRUPT(252) \
+ DECLARE_INTERRUPT(253) \
+ DECLARE_INTERRUPT(254) \
+ DECLARE_INTERRUPT(255));
projects / oweals / u-boot.git / blobdiff