Merge branch 'master' of git://git.denx.de/u-boot-i2c

[oweals/u-boot.git] / cpu / blackfin / initcode.c

diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c
index d44c6a6fc55ca6d040a28249a3badcb2887ae27e..a039cbbbce12d4969b5d9a3f9b2b2452da37f721 100644 (file)
--- a/cpu/blackfin/initcode.c
+++ b/cpu/blackfin/initcode.c
@@ -92,7 +92,7 @@ static inline void serial_putc(char c)
                return;
 
        if (c == '\n')
-               *pUART_THR = '\r';
+               serial_putc('\r');
 
        *pUART_THR = c;
 
@@ -246,6 +246,15 @@ static inline void serial_putc(char c)
 #endif
 #endif
 
+/* Conflicting Column Address Widths Causes SDRAM Errors:
+ * EB2CAW and EB3CAW must be the same
+ */
+#if ANOMALY_05000362
+# if ((CONFIG_EBIU_SDBCTL_VAL & 0x30000000) >> 8) != (CONFIG_EBIU_SDBCTL_VAL & 0x00300000)
+#  error "Anomaly 05000362: EB2CAW and EB3CAW must be the same"
+# endif
+#endif
+
 BOOTROM_CALLED_FUNC_ATTR
 void initcode(ADI_BOOT_DATA *bootstruct)
 {
@@ -335,6 +344,7 @@ void initcode(ADI_BOOT_DATA *bootstruct)
        if (!ANOMALY_05000386) {
                serial_putc('F');
 
+               /* Always programming PLL_LOCKCNT avoids Anomaly 05000430 */
                ADI_SYSCTRL_VALUES memory_settings;
                uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_PLLDIV | SYSCTRL_LOCKCNT;
                if (CONFIG_HAS_VR) {
@@ -379,6 +389,7 @@ void initcode(ADI_BOOT_DATA *bootstruct)
 
                serial_putc('H');
 
+               /* Always programming PLL_LOCKCNT avoids Anomaly 05000430 */
                bfin_write_PLL_LOCKCNT(CONFIG_PLL_LOCKCNT_VAL);
 
                serial_putc('I');
@@ -401,7 +412,7 @@ void initcode(ADI_BOOT_DATA *bootstruct)
                /* Only reprogram when needed to avoid triggering unnecessary
                 * PLL relock sequences.
                 */
-               if (bfin_read_PLL_CTL() != CONFIG_PLL_CTL_VAL) {
+               if (ANOMALY_05000242 || bfin_read_PLL_CTL() != CONFIG_PLL_CTL_VAL) {
                        serial_putc('!');
                        bfin_write_PLL_CTL(CONFIG_PLL_CTL_VAL);
                        asm("idle;");
@@ -532,9 +543,11 @@ void initcode(ADI_BOOT_DATA *bootstruct)
 
        serial_putc('T');
 
+#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1
        /* tell the bootrom where our entry point is */
        if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS)
                bfin_write_EVT1(CONFIG_SYS_MONITOR_BASE);
+#endif
 
        serial_putc('>');
        serial_putc('\n');