Merge commit 'u-boot/master' into for-1.3.1

[oweals/u-boot.git] / cpu / bf533 / cpu.c

diff --git a/cpu/bf533/cpu.c b/cpu/bf533/cpu.c
index bd393d597f9c4143eefa184739ea22b284bb1f69..8118861f8d86fe4b9f0421f67ccaede04b6663ba 100644 (file)
--- a/cpu/bf533/cpu.c
+++ b/cpu/bf533/cpu.c
@@ -1,7 +1,7 @@
 /*
  * U-boot - cpu.c CPU specific functions
  *
- * Copyright (c) 2005 blackfin.uclinux.org
+ * Copyright (c) 2005-2007 Analog Devices Inc.
  *
  * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -21,8 +21,8 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
  */
 
 #include <common.h>
@@ -30,6 +30,7 @@
 #include <command.h>
 #include <asm/entry.h>
 #include <asm/cplb.h>
+#include <asm/io.h>
 
 #define CACHE_ON 1
 #define CACHE_OFF 0
@@ -37,16 +38,6 @@
 extern unsigned int icplb_table[page_descriptor_table_size][2];
 extern unsigned int dcplb_table[page_descriptor_table_size][2];
 
-#ifdef DEBUG
-#define pr_debug(fmt,arg...)  printf(fmt,##arg)
-#else
-static inline int
-    __attribute__ ((format(printf, 1, 2))) pr_debug(const char *fmt, ...)
-{
-       return 0;
-}
-#endif
-
 int do_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
        __asm__ __volatile__("cli r3;" "P0 = %0;" "JUMP (P0);"::"r"(L1_ISRAM)
@@ -70,10 +61,6 @@ void icache_enable(void)
 {
        unsigned int *I0, *I1;
        int i, j = 0;
-#ifdef __ADSPBF537__
-       if ((*pCHIPID >> 28) < 2)
-               return;
-#endif
 
        /* Before enable icache, disable it first */
        icache_disable();
@@ -83,7 +70,7 @@ void icache_enable(void)
        /* make sure the locked ones go in first */
        for (i = 0; i < page_descriptor_table_size; i++) {
                if (CPLB_LOCK & icplb_table[i][1]) {
-                       pr_debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
+                       debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
                                 icplb_table[i][0], icplb_table[i][1]);
                        *I0++ = icplb_table[i][0];
                        *I1++ = icplb_table[i][1];
@@ -93,7 +80,7 @@ void icache_enable(void)
 
        for (i = 0; i < page_descriptor_table_size; i++) {
                if (!(CPLB_LOCK & icplb_table[i][1])) {
-                       pr_debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
+                       debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
                                 icplb_table[i][0], icplb_table[i][1]);
                        *I0++ = icplb_table[i][0];
                        *I1++ = icplb_table[i][1];
@@ -106,32 +93,28 @@ void icache_enable(void)
 
        /* Fill the rest with invalid entry */
        if (j <= 15) {
-               for (; j <= 16; j++) {
-                       pr_debug("filling %i with 0", j);
+               for (; j < 16; j++) {
+                       debug("filling %i with 0", j);
                        *I1++ = 0x0;
                }
 
        }
 
        cli();
-       __builtin_bfin_ssync();
+       sync();
        asm(" .align 8; ");
        *(unsigned int *)IMEM_CONTROL = IMC | ENICPLB;
-       __builtin_bfin_ssync();
+       sync();
        sti();
 }
 
 void icache_disable(void)
 {
-#ifdef __ADSPBF537__
-       if ((*pCHIPID >> 28) < 2)
-               return;
-#endif
        cli();
-       __builtin_bfin_ssync();
+       sync();
        asm(" .align 8; ");
        *(unsigned int *)IMEM_CONTROL &= ~(IMC | ENICPLB);
-       __builtin_bfin_ssync();
+       sync();
        sti();
 }
 
@@ -160,20 +143,20 @@ void dcache_enable(void)
        /* make sure the locked ones go in first */
        for (i = 0; i < page_descriptor_table_size; i++) {
                if (CPLB_LOCK & dcplb_table[i][1]) {
-                       pr_debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
+                       debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
                                 dcplb_table[i][0], dcplb_table[i][1]);
                        *I0++ = dcplb_table[i][0];
                        *I1++ = dcplb_table[i][1];
                        j++;
                } else {
-                       pr_debug("skip   %02i %02i 0x%08x 0x%08x\n", i, j,
+                       debug("skip   %02i %02i 0x%08x 0x%08x\n", i, j,
                                 dcplb_table[i][0], dcplb_table[i][1]);
                }
        }
 
        for (i = 0; i < page_descriptor_table_size; i++) {
                if (!(CPLB_LOCK & dcplb_table[i][1])) {
-                       pr_debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
+                       debug("adding %02i %02i 0x%08x 0x%08x\n", i, j,
                                 dcplb_table[i][0], dcplb_table[i][1]);
                        *I0++ = dcplb_table[i][0];
                        *I1++ = dcplb_table[i][1];
@@ -186,34 +169,33 @@ void dcache_enable(void)
 
        /* Fill the rest with invalid entry */
        if (j <= 15) {
-               for (; j <= 16; j++) {
-                       pr_debug("filling %i with 0", j);
+               for (; j < 16; j++) {
+                       debug("filling %i with 0", j);
                        *I1++ = 0x0;
                }
        }
 
        cli();
        temp = *(unsigned int *)DMEM_CONTROL;
-       __builtin_bfin_ssync();
+       sync();
        asm(" .align 8; ");
        *(unsigned int *)DMEM_CONTROL =
            ACACHE_BCACHE | ENDCPLB | PORT_PREF0 | temp;
-       __builtin_bfin_ssync();
+       sync();
        sti();
 }
 
 void dcache_disable(void)
 {
-
        unsigned int *I0, *I1;
        int i;
 
        cli();
-       __builtin_bfin_ssync();
+       sync();
        asm(" .align 8; ");
        *(unsigned int *)DMEM_CONTROL &=
            ~(ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
-       __builtin_bfin_ssync();
+       sync();
        sti();
 
        /* after disable dcache,