Merge with /home/raj/git/u-boot#ads5121_fec_optimize

[oweals/u-boot.git] / cpu / arm920t / start.S

diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 4603cf573376fdfaa5b7b88933c6b1190591976a..b9c364bc67291b03b8d56cd2d97e7432604f96ea 100644 (file)
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -27,7 +27,9 @@
 
 #include <config.h>
 #include <version.h>
-
+#if    defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+#include       <led.h>
+#endif
 
 /*
  *************************************************************************
@@ -116,6 +118,69 @@ reset:
        orr     r0,r0,#0xd3
        msr     cpsr,r0
 
+#if    CONFIG_AT91RM9200
+#if    defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+       bl LED_init
+       bl red_LED_on
+#endif
+
+#ifdef CONFIG_BOOTBINFUNC
+/* code based on entry.S from ATMEL */
+#define AT91C_BASE_CKGR 0xFFFFFC20
+#define CKGR_MOR 0
+       /* Get the CKGR Base Address */
+       ldr     r1, =AT91C_BASE_CKGR
+
+/* Main oscillator Enable register     APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */
+/*     ldr     r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT */
+       ldr     r0, =0x0000FF01
+       str     r0, [r1, #CKGR_MOR]
+       /* Add loop to compensate Main Oscillator startup time */
+       ldr     r0, =0x00000010
+LoopOsc:
+       subs    r0, r0, #1
+       bhi     LoopOsc
+       /* scratch stack */
+       ldr     r1, =0x00204000
+       /* Insure word alignment */
+       bic     r1, r1, #3
+       /* Init stack SYS        */
+       mov     sp, r1
+       /*
+        * This does a lot more than just set up the memory, which
+        * is why it's called lowlevelinit
+        */
+       bl      lowlevelinit /* in memsetup.S */
+       bl      icache_enable;
+       /* ------------------------------------
+        * Read/modify/write CP15 control register
+        * -------------------------------------
+        * read cp15 control register (cp15 r1) in r0
+        * ------------------------------------
+        */
+       mrc     p15, 0, r0, c1, c0, 0
+       /* Reset bit :Little Endian end fast bus mode */
+       ldr     r3, =0xC0000080
+       /* Set bit :Asynchronous clock mode, Not Fast Bus */
+       ldr     r4, =0xC0000000
+       bic     r0, r0, r3
+       orr     r0, r0, r4
+       /* write r0 in cp15 control register (cp15 r1) */
+       mcr     p15, 0, r0, c1, c0, 0
+#endif /* CONFIG_BOOTBINFUNC */
+       /*
+        * relocate exeception table
+        */
+       ldr     r0, =_start
+       ldr     r1, =0x0
+       mov     r2, #16
+copyex:
+       subs    r2, r2, #1
+       ldr     r3, [r0], #4
+       str     r3, [r1], #4
+       bne     copyex
+#endif
+
 /* turn off the watchdog */
 #if defined(CONFIG_S3C2400)
 # define pWTCON                0x15300000
@@ -160,6 +225,26 @@ reset:
        bl      cpu_init_crit
 #endif
 
+#ifdef CONFIG_AT91RM9200
+#ifdef CONFIG_BOOTBINFUNC
+relocate:                              /* relocate U-Boot to RAM           */
+       adr     r0, _start              /* r0 <- current position of code   */
+       ldr     r1, _TEXT_BASE          /* test if we run from flash or RAM */
+       cmp     r0, r1                  /* don't reloc during debug         */
+       beq     stack_setup
+
+       ldr     r2, _armboot_start
+       ldr     r3, _bss_start
+       sub     r2, r3, r2              /* r2 <- size of armboot            */
+       add     r2, r0, r2              /* r2 <- source end address         */
+
+copy_loop:
+       ldmia   r0!, {r3-r10}           /* copy from source address [r0]    */
+       stmia   r1!, {r3-r10}           /* copy to   target address [r1]    */
+       cmp     r0, r2                  /* until source end addreee [r2]    */
+       ble     copy_loop
+#endif /* CONFIG_BOOTBINFUNC */
+#else
 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 relocate:                              /* relocate U-Boot to RAM           */
        adr     r0, _start              /* r0 <- current position of code   */
@@ -178,7 +263,7 @@ copy_loop:
        cmp     r0, r2                  /* until source end addreee [r2]    */
        ble     copy_loop
 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
+#endif
        /* Set up the stack                                                 */
 stack_setup:
        ldr     r0, _TEXT_BASE          /* upper 128 KiB: relocated uboot   */
@@ -237,6 +322,7 @@ _start_armboot:     .word start_armboot
  */
 
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 cpu_init_crit:
        /*
         * flush v4 I/D caches
@@ -261,10 +347,14 @@ cpu_init_crit:
         * find a lowlevel_init.S in your board directory.
         */
        mov     ip, lr
+#if    defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+
+#else
        bl      lowlevel_init
+#endif
        mov     lr, ip
        mov     pc, lr
-
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 
 /*
  *************************************************************************