Merge branch 'master' of git://www.denx.de/git/u-boot-video

[oweals/u-boot.git] / cpu / arm920t / start.S

diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 346f0d09ea77a18b2c9a7b2a3d08a078a9aa4741..acc00ad9706309be4e0bdb4d564e61903fb688bd 100644 (file)
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -27,7 +27,7 @@
 
 #include <config.h>
 #include <version.h>
-
+#include <status_led.h>
 
 /*
  *************************************************************************
@@ -39,7 +39,7 @@
 
 
 .globl _start
-_start:        b       reset
+_start:        b       start_code
        ldr     pc, _undefined_instruction
        ldr     pc, _software_interrupt
        ldr     pc, _prefetch_abort
@@ -62,7 +62,7 @@ _fiq:                 .word fiq
 /*
  *************************************************************************
  *
- * Startup Code (reset vector)
+ * Startup Code (called from the ARM reset exception vector)
  *
  * do important init only if we don't start from memory!
  * relocate armboot to ram
@@ -104,10 +104,10 @@ FIQ_STACK_START:
 
 
 /*
- * the actual reset code
+ * the actual start code
  */
 
-reset:
+start_code:
        /*
         * set the cpu to SVC32 mode
         */
@@ -116,19 +116,37 @@ reset:
        orr     r0,r0,#0xd3
        msr     cpsr,r0
 
-/* turn off the watchdog */
-#if defined(CONFIG_S3C2400)
-# define pWTCON                0x15300000
-# define INTMSK                0x14400008      /* Interupt-Controller base addresses */
-# define CLKDIVN       0x14800014      /* clock divisor register */
-#elif defined(CONFIG_S3C2410)
-# define pWTCON                0x53000000
-# define INTMSK                0x4A000008      /* Interupt-Controller base addresses */
-# define INTSUBMSK     0x4A00001C
-# define CLKDIVN       0x4C000014      /* clock divisor register */
+       bl coloured_LED_init
+       bl red_LED_on
+
+#if    defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+       /*
+        * relocate exception table
+        */
+       ldr     r0, =_start
+       ldr     r1, =0x0
+       mov     r2, #16
+copyex:
+       subs    r2, r2, #1
+       ldr     r3, [r0], #4
+       str     r3, [r1], #4
+       bne     copyex
 #endif
 
 #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
+       /* turn off the watchdog */
+
+# if defined(CONFIG_S3C2400)
+#  define pWTCON               0x15300000
+#  define INTMSK               0x14400008      /* Interupt-Controller base addresses */
+#  define CLKDIVN      0x14800014      /* clock divisor register */
+#else
+#  define pWTCON               0x53000000
+#  define INTMSK               0x4A000008      /* Interupt-Controller base addresses */
+#  define INTSUBMSK    0x4A00001C
+#  define CLKDIVN      0x4C000014      /* clock divisor register */
+# endif
+
        ldr     r0, =pWTCON
        mov     r1, #0x0
        str     r1, [r0]
@@ -160,6 +178,8 @@ reset:
        bl      cpu_init_crit
 #endif
 
+#ifndef        CONFIG_AT91RM9200
+
 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 relocate:                              /* relocate U-Boot to RAM           */
        adr     r0, _start              /* r0 <- current position of code   */
@@ -178,7 +198,7 @@ copy_loop:
        cmp     r0, r2                  /* until source end addreee [r2]    */
        ble     copy_loop
 #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
+#endif
        /* Set up the stack                                                 */
 stack_setup:
        ldr     r0, _TEXT_BASE          /* upper 128 KiB: relocated uboot   */
@@ -199,27 +219,6 @@ clbss_l:str        r2, [r0]                /* clear loop...                    */
        cmp     r0, r1
        ble     clbss_l
 
-#if 0
-       /* try doing this stuff after the relocation */
-       ldr     r0, =pWTCON
-       mov     r1, #0x0
-       str     r1, [r0]
-
-       /*
-        * mask all IRQs by setting all bits in the INTMR - default
-        */
-       mov     r1, #0xffffffff
-       ldr     r0, =INTMR
-       str     r1, [r0]
-
-       /* FCLK:HCLK:PCLK = 1:2:4 */
-       /* default FCLK is 120 MHz ! */
-       ldr     r0, =CLKDIVN
-       mov     r1, #3
-       str     r1, [r0]
-       /* END stuff after relocation */
-#endif
-
        ldr     pc, _start_armboot
 
 _start_armboot:        .word start_armboot
@@ -262,7 +261,11 @@ cpu_init_crit:
         * find a lowlevel_init.S in your board directory.
         */
        mov     ip, lr
+#if    defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+
+#else
        bl      lowlevel_init
+#endif
        mov     lr, ip
        mov     pc, lr
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
@@ -326,12 +329,12 @@ cpu_init_crit:
        .macro  irq_save_user_regs
        sub     sp, sp, #S_FRAME_SIZE
        stmia   sp, {r0 - r12}                  @ Calling r0-r12
-       add     r8, sp, #S_PC
-       stmdb   r8, {sp, lr}^                   @ Calling SP, LR
-       str     lr, [r8, #0]                    @ Save calling PC
+       add     r7, sp, #S_PC
+       stmdb   r7, {sp, lr}^                   @ Calling SP, LR
+       str     lr, [r7, #0]                    @ Save calling PC
        mrs     r6, spsr
-       str     r6, [r8, #4]                    @ Save CPSR
-       str     r0, [r8, #8]                    @ Save OLD_R0
+       str     r6, [r7, #4]                    @ Save CPSR
+       str     r0, [r7, #8]                    @ Save OLD_R0
        mov     r0, sp
        .endm