Add support for multiple PHYs.

[oweals/u-boot.git] / cpu / arm920t / at91rm9200 / ether.c

diff --git a/cpu/arm920t/at91rm9200/ether.c b/cpu/arm920t/at91rm9200/ether.c
index bff95b6eace4557aa60dfd7863faa1cfe88f783b..67008d0b9112ece297408d2f5000b164a45e4ec1 100644 (file)
--- a/cpu/arm920t/at91rm9200/ether.c
+++ b/cpu/arm920t/at91rm9200/ether.c
@@ -23,6 +23,7 @@
 
 #include <at91rm9200_net.h>
 #include <net.h>
+#include <miiphy.h>
 
 /* ----- Ethernet Buffer definitions ----- */
 
@@ -44,21 +45,19 @@ typedef struct {
 #define RBF_LOCAL2    (1<<24)
 #define RBF_LOCAL1    (1<<23)
 
-/* Emac Buffers in last 512KBytes of SDRAM*/
-/* Be careful, buffer size is limited to 512KBytes !!! */
-#define RBF_FRAMEMAX 100
-/*#define RBF_FRAMEMEM 0x200000 */
-#define RBF_FRAMEMEM 0x21F80000
+#define RBF_FRAMEMAX 64
 #define RBF_FRAMELEN 0x600
 
-#define RBF_FRAMEBTD RBF_FRAMEMEM
-#define RBF_FRAMEBUF (RBF_FRAMEMEM + RBF_FRAMEMAX*sizeof(rbf_t))
-
-
 #ifdef CONFIG_DRIVER_ETHER
 
 #if (CONFIG_COMMANDS & CFG_CMD_NET)
 
+/* alignment as per Errata #11 (64 bytes) is insufficient! */
+rbf_t rbfdt[RBF_FRAMEMAX] __attribute((aligned(512)));
+rbf_t *rbfp;
+
+unsigned char rbf_framebuf[RBF_FRAMEMAX][RBF_FRAMELEN] __attribute((aligned(4)));
+
 /* structure to interface the PHY */
 AT91S_PhyOps PhyOps;
 
@@ -152,10 +151,6 @@ UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac,
        return TRUE;
 }
 
-
-rbf_t *rbfdt;
-rbf_t *rbfp;
-
 int eth_init (bd_t * bd)
 {
        int ret;
@@ -188,9 +183,8 @@ int eth_init (bd_t * bd)
        p_mac->EMAC_CFG |= AT91C_EMAC_CSR;      /* Clear statistics */
 
        /* Init Ehternet buffers */
-       rbfdt = (rbf_t *) RBF_FRAMEBTD;
        for (i = 0; i < RBF_FRAMEMAX; i++) {
-               rbfdt[i].addr = RBF_FRAMEBUF + RBF_FRAMELEN * i;
+               rbfdt[i].addr = (unsigned long)rbf_framebuf[i];
                rbfdt[i].size = 0;
        }
        rbfdt[RBF_FRAMEMAX - 1].addr |= RBF_WRAP;
@@ -271,8 +265,9 @@ void eth_halt (void)
 {
 };
 
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
-int  miiphy_read(unsigned char addr, unsigned char reg, unsigned short * value)
+#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+int  at91rm9200_miiphy_read(char *devname, unsigned char addr,
+               unsigned char reg, unsigned short * value)
 {
        at91rm9200_EmacEnableMDIO (p_mac);
        at91rm9200_EmacReadPhy (p_mac, reg, value);
@@ -280,14 +275,24 @@ int  miiphy_read(unsigned char addr, unsigned char reg, unsigned short * value)
        return 0;
 }
 
-int  miiphy_write(unsigned char addr, unsigned char reg, unsigned short value)
+int  at91rm9200_miiphy_write(char *devname, unsigned char addr,
+               unsigned char reg, unsigned short value)
 {
        at91rm9200_EmacEnableMDIO (p_mac);
        at91rm9200_EmacWritePhy (p_mac, reg, &value);
        at91rm9200_EmacDisableMDIO (p_mac);
        return 0;
 }
-#endif /* CONFIG_COMMANDS & CFG_CMD_MII */
+
+#endif /* defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) */
+
+int at91rm9200_miiphy_initialize(bd_t *bis)
+{
+#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+       miiphy_register("at91rm9200phy", at91rm9200_miiphy_read, at91rm9200_miiphy_write);
+#endif
+       return 0;
+}
 
 #endif /* CONFIG_COMMANDS & CFG_CMD_NET */