unsigned int *pTime = (unsigned int *)data;
(*pTime)++;
- if ( !(*pTime % (CFG_HZ/4))) {
+ if ( !(*pTime % (CONFIG_SYS_HZ/4))) {
/* toggle LED 0 */
PUT_REG( REG_IOPDATA, GET_REG(REG_IOPDATA) ^ 0x1);
}
static ulong timestamp;
static ulong lastdec;
-int interrupt_init (void)
+#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C4510B)
+int arch_interrupt_init (void)
{
+ int i;
+
+ /* install default interrupt handlers */
+ for ( i = 0; i < N_IRQS; i++) {
+ IRQ_HANDLER[i].m_data = (void *)i;
+ IRQ_HANDLER[i].m_func = default_isr;
+ }
+
+ /* configure interrupts for IRQ mode */
+ PUT_REG( REG_INTMODE, 0x0);
+ /* clear any pending interrupts */
+ PUT_REG( REG_INTPEND, 0x1FFFFF);
+
+ lastdec = 0;
+
+ /* install interrupt handler for timer */
+ IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp;
+ IRQ_HANDLER[INT_TIMER0].m_func = timer_isr;
+
+ return 0;
+}
+#endif
+int timer_init (void)
+{
#if defined(CONFIG_NETARM)
/* disable all interrupts */
IRQEN = 0;
/* operate timer 2 in non-prescale mode */
- TM2CTRL = ( NETARM_GEN_TIMER_SET_HZ(CFG_HZ) |
+ TM2CTRL = ( NETARM_GEN_TIMER_SET_HZ(CONFIG_SYS_HZ) |
NETARM_GEN_TCTL_ENABLE |
NETARM_GEN_TCTL_INIT_COUNT(TIMER_LOAD_VAL));
/* set timer 1 counter */
lastdec = IO_TC1D = TIMER_LOAD_VAL;
#elif defined(CONFIG_S3C4510B)
- int i;
-
- /* install default interrupt handlers */
- for ( i = 0; i < N_IRQS; i++) {
- IRQ_HANDLER[i].m_data = (void *)i;
- IRQ_HANDLER[i].m_func = default_isr;
- }
-
- /* configure interrupts for IRQ mode */
- PUT_REG( REG_INTMODE, 0x0);
- /* clear any pending interrupts */
- PUT_REG( REG_INTPEND, 0x1FFFFF);
-
- lastdec = 0;
-
- /* install interrupt handler for timer */
- IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp;
- IRQ_HANDLER[INT_TIMER0].m_func = timer_isr;
-
/* configure free running timer 0 */
PUT_REG( REG_TMOD, 0x0);
/* Stop timer 0 */
/*
* Load Timer data register with count down value.
- * count_down_val = CFG_SYS_CLK_FREQ/CFG_HZ
+ * count_down_val = CONFIG_SYS_SYS_CLK_FREQ/CONFIG_SYS_HZ
*/
- PUT_REG( REG_TDATA0, (CFG_SYS_CLK_FREQ / CFG_HZ));
+ PUT_REG( REG_TDATA0, (CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ));
/*
* Enable global interrupt
#elif defined(CONFIG_LPC2292)
PUT32(T0IR, 0); /* disable all timer0 interrupts */
PUT32(T0TCR, 0); /* disable timer0 */
- PUT32(T0PR, CFG_SYS_CLK_FREQ / CFG_HZ);
- PUT32(T0MCR, 0);
+ PUT32(T0PR, CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ);
+ PUT32(T0MCR, 0);
PUT32(T0TC, 0);
PUT32(T0TCR, 1); /* enable timer0 */
#else
-#error No interrupt_init() defined for this CPU type
+#error No timer_init() defined for this CPU type
#endif
timestamp = 0;
ulong tmo;
tmo = usec / 1000;
- tmo *= CFG_HZ;
+ tmo *= CONFIG_SYS_HZ;
tmo /= 1000;
tmo += get_timer (0);
if (usec >= 1000) {
tmo = usec / 1000;
- tmo *= CFG_HZ;
+ tmo *= CONFIG_SYS_HZ;
tmo /= 1000;
} else {
- tmo = usec * CFG_HZ;
+ tmo = usec * CONFIG_SYS_HZ;
tmo /= (1000*1000);
}
{
u32 ticks;
- ticks = (usec * CFG_HZ) / 1000000;
+ ticks = (usec * CONFIG_SYS_HZ) / 1000000;
ticks += get_timer (0);