#include <74xx_7xx.h>
#include <asm/cache.h>
+#ifdef CONFIG_AMIGAONEG3SE
+#include "../board/MAI/AmigaOneG3SE/via686.h"
+#include "../board/MAI/AmigaOneG3SE/memio.h"
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
cpu_t
get_cpu_type(void)
{
case 0x0008:
type = CPU_750;
- if (((pvr >> 8) & 0xff) == 0x01) {
+ if (((pvr >> 8) & 0xff) == 0x01) {
type = CPU_750CX; /* old CX (80100 and 8010x?)*/
} else if (((pvr >> 8) & 0xff) == 0x22) {
type = CPU_750CX; /* CX (82201,82202) and CXe (82214) */
type = CPU_750CX; /* CXe (83311) */
} else if (((pvr >> 12) & 0xF) == 0x3) {
type = CPU_755;
- }
+ }
+ break;
+
+ case 0x7000:
+ type = CPU_750FX;
+ break;
+
+ case 0x7002:
+ type = CPU_750GX;
break;
case 0x800C:
type = CPU_7410;
break;
- case 0x8000:
+ case 0x8000:
type = CPU_7450;
break;
+ case 0x8001:
+ type = CPU_7455;
+ break;
+
+ case 0x8002:
+ type = CPU_7457;
+ break;
+
default:
break;
}
#if !defined(CONFIG_BAB7xx)
int checkcpu (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint type = get_cpu_type();
uint pvr = get_pvr();
ulong clock = gd->cpu_clk;
str = "750";
break;
+ case CPU_750FX:
+ str = "750FX";
+ break;
+
+ case CPU_750GX:
+ str = "750GX";
+ break;
+
case CPU_755:
str = "755";
break;
str = "MPC7400";
break;
- case CPU_7410:
- str = "MPC7410";
+ case CPU_7410:
+ str = "MPC7410";
+ break;
+
+ case CPU_7450:
+ str = "MPC7450";
break;
- case CPU_7450:
- str = "MPC7450";
+ case CPU_7455:
+ str = "MPC7455";
+ break;
+
+ case CPU_7457:
+ str = "MPC7457";
break;
default:
- printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
+ printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
return -1;
}
#endif
/* these two functions are unimplemented currently [josh] */
-/* ------------------------------------------------------------------------- */
-/* L1 i-cache */
+/* -------------------------------------------------------------------- */
+/* L1 i-cache */
int
checkicache(void)
return 0; /* XXX */
}
-/* ------------------------------------------------------------------------- */
-/* L1 d-cache */
+/* -------------------------------------------------------------------- */
+/* L1 d-cache */
int
checkdcache(void)
return 0; /* XXX */
}
-/* ------------------------------------------------------------------------- */
+/* -------------------------------------------------------------------- */
static inline void
soft_restart(unsigned long addr)
#if !defined(CONFIG_PCIPPC2) && \
!defined(CONFIG_BAB7xx) && \
- !defined(CONFIG_ELPPC)
+ !defined(CONFIG_ELPPC) && \
+ !defined(CONFIG_PPMC7XX)
/* no generic way to do board reset. simply call soft_reset. */
void
-do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
ulong addr;
/* flush and disable I/D cache */
/*
* For the 7400 the TB clock runs at 1/4 the cpu bus speed.
*/
-unsigned long
-get_tbclk (void)
+#ifdef CONFIG_AMIGAONEG3SE
+unsigned long get_tbclk(void)
{
- return CFG_BUS_HZ / 4;
+ return (gd->bus_clk / 4);
}
+#else /* ! CONFIG_AMIGAONEG3SE */
+unsigned long get_tbclk (void)
+{
+ return CFG_BUS_HZ / 4;
+}
+#endif /* CONFIG_AMIGAONEG3SE */
/* ------------------------------------------------------------------------- */
#if defined(CONFIG_WATCHDOG)