rockchip: rk3188: fix early uart setup

[oweals/u-boot.git] / configs / zynq_zc702_defconfig

diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index 58b9c308cf380261d0a82153f7936e2bb7d6e6a2..5223a9bc68da86563bea9f9a8edf996fcbfe5676 100644 (file)
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -3,9 +3,10 @@ CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
 CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xe0001000
+CONFIG_DEBUG_UART_CLOCK=50000000
 CONFIG_IDENT_STRING=" Xilinx Zynq ZC702"
 CONFIG_SPL_STACK_R_ADDR=0x200000
-CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
 CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
@@ -34,6 +35,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
+CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
@@ -44,10 +46,13 @@ CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 CONFIG_SYS_I2C_ZYNQ=y
 CONFIG_ZYNQ_I2C0=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -55,10 +60,9 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_XILINX=y
+CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
-CONFIG_DEBUG_UART_BASE=0xe0001000
-CONFIG_DEBUG_UART_CLOCK=50000000
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_ZYNQ_QSPI=y
 CONFIG_USB=y