imx: mx6ul_14x14_evk: configure for 24bpp display

[oweals/u-boot.git] / configs / zynq_dlc20_rev1_0_defconfig

diff --git a/configs/zynq_dlc20_rev1_0_defconfig b/configs/zynq_dlc20_rev1_0_defconfig
index d2eaf5c90f634278fe7df4feeb0d06b8887ebc40..d52b4b8396b47740cc1790d7b9f5023f045b55d1 100644 (file)
--- a/configs/zynq_dlc20_rev1_0_defconfig
+++ b/configs/zynq_dlc20_rev1_0_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_DM_GPIO=y
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xe0001000
@@ -23,7 +24,6 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_DFU=y
-# CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADFS=y
 CONFIG_CMD_FPGA_LOADMK=y
@@ -38,13 +38,13 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-dlc20-rev1.0"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQPL=y
-CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MISC=y