rockchip: rk3328: default enable SPL LIBCOMMON and LIBGENERIC
[oweals/u-boot.git] / configs / xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index f4ece0ccc81036371636269fb0a1763942a6f21e..7b1f5e9d0ae3b9ca035fb034f501003aee5d6f8e 100644 (file)
@@ -1,5 +1,4 @@
 CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1"
 CONFIG_ARCH_ZYNQMP=y
 CONFIG_SYS_TEXT_BASE=0x8000000
 CONFIG_SYS_MALLOC_F_LEN=0x8000
@@ -7,6 +6,7 @@ CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xff000000
 CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_ZYNQMP_USB=y
+CONFIG_SPL_ZYNQMP_TWO_SDHCI=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
@@ -15,6 +15,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SPL_TEXT_BASE=0xfffc0000
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
@@ -28,6 +29,7 @@ CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -39,7 +41,6 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -57,12 +58,11 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
-CONFIG_SF_DUAL_FLASH=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y