x86: Update SPL for coreboot

[oweals/u-boot.git] / configs / rock_defconfig

diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index 0858a1f1f67582ec504ceb029211d65153fb3244..4e804e92555ec367180138a658800295efa38bfd 100644 (file)
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -4,15 +4,15 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x60000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_ROCKCHIP_RK3188=y
 CONFIG_TARGET_ROCK=y
-CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_SPL_STACK_R_ADDR=0x60080000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0x20064000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x10080800
+CONFIG_DEBUG_UART=y
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set