x86: Update SPL for coreboot

[oweals/u-boot.git] / configs / qemu-riscv64_defconfig

diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index 6f5297321a20dc6f50febf9c5f5c9b14e0ba980a..d1949ad145d00c6771c71a7806f1eec155541fce 100644 (file)
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -1,4 +1,5 @@
 CONFIG_RISCV=y
+CONFIG_ENV_SIZE=0x20000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_TARGET_QEMU_VIRT=y
 CONFIG_ARCH_RV64I=y
@@ -10,3 +11,5 @@ CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM_MTD=y