Merge tag 'efi-2020-04-rc4-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

[oweals/u-boot.git] / configs / T2081QDS_SPIFLASH_defconfig

diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index f6a3f61938c4ad50c840c852c09d4c74fa5c9179..242b11c8912952a92dcae7d86e5d48bcd7c5d1b5 100644 (file)
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -2,6 +2,9 @@ CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x00201000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_ENV_OFFSET=0x100000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
@@ -9,15 +12,17 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2081QDS=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
 CONFIG_BOOTDELAY=10
 CONFIG_BOARD_EARLY_INIT_R=y
 # CONFIG_SPL_FRAMEWORK is not set
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
+CONFIG_SPL_SPI_BOOT=y
+CONFIG_SPL_FSL_PBL=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
@@ -38,8 +43,10 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_ADDR=0xFFFC9000
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
@@ -54,7 +61,9 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
+CONFIG_FMAN_ENET=y
 CONFIG_MII=y
+CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y