x86: Update SPL for coreboot

[oweals/u-boot.git] / configs / P3041DS_SRIO_PCIE_BOOT_defconfig

diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
index cf9e2dd32fc4de6b67789cd2c4cc8cb5a2d1d78a..c34311b2f939e30cac19d7ae9c443c76d5c883ee 100644 (file)
--- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
@@ -28,11 +28,15 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_ENV_ADDR=0xFFE20000
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y