Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

[oweals/u-boot.git] / configs / MPC8349ITX_LOWBOOT_defconfig

diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index de97bb15b2b4368d7f5982c0e082300c2af227a8..a1d2a89e4aab440091653578586b17f379388db9 100644 (file)
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -1,5 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFE000000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SYS_CLK_FREQ=66666666
 CONFIG_MPC83xx=y
 CONFIG_HIGH_BATS=y
@@ -85,6 +87,67 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
 CONFIG_BAT6_DCACHE_GUARDED=y
 CONFIG_BAT6_USER_MODE_VALID=y
 CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_LBLAW0=y
+CONFIG_LBLAW0_BASE=0xFE000000
+CONFIG_LBLAW0_NAME="FLASH"
+CONFIG_LBLAW0_LENGTH_16_MBYTES=y
+CONFIG_LBLAW1=y
+CONFIG_LBLAW1_BASE=0xF8000000
+CONFIG_LBLAW1_NAME="VSC7385"
+CONFIG_LBLAW1_LENGTH_128_KBYTES=y
+CONFIG_LBLAW3=y
+CONFIG_LBLAW3_BASE=0xF0000000
+CONFIG_LBLAW3_NAME="CF"
+CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_ELBC_BR0_OR0=y
+CONFIG_BR0_OR0_NAME="FLASH"
+CONFIG_BR0_OR0_BASE=0xFE000000
+CONFIG_BR0_PORTSIZE_16BIT=y
+CONFIG_OR0_AM_16_MBYTES=y
+CONFIG_OR0_XAM_SET=y
+CONFIG_OR0_SCY_15=y
+CONFIG_OR0_CSNT_EARLIER=y
+CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
+CONFIG_OR0_XACS_EXTENDED=y
+CONFIG_OR0_TRLX_RELAXED=y
+CONFIG_OR0_EHTR_8_CYCLE=y
+CONFIG_OR0_EAD_EXTRA=y
+CONFIG_ELBC_BR1_OR1=y
+CONFIG_BR1_OR1_NAME="VSC7385"
+CONFIG_BR1_OR1_BASE=0xF8000000
+CONFIG_OR1_AM_128_KBYTES=y
+CONFIG_OR1_SCY_15=y
+CONFIG_OR1_CSNT_EARLIER=y
+CONFIG_OR1_XACS_EXTENDED=y
+CONFIG_OR1_SETA_EXTERNAL=y
+CONFIG_OR1_TRLX_RELAXED=y
+CONFIG_OR1_EHTR_8_CYCLE=y
+CONFIG_OR1_EAD_EXTRA=y
+CONFIG_ELBC_BR2_OR2=y
+CONFIG_BR2_OR2_NAME="LED"
+CONFIG_BR2_OR2_BASE=0xF9000000
+CONFIG_OR2_AM_2_MBYTES=y
+CONFIG_OR2_SCY_9=y
+CONFIG_OR2_CSNT_EARLIER=y
+CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y
+CONFIG_OR2_XACS_EXTENDED=y
+CONFIG_OR2_TRLX_RELAXED=y
+CONFIG_OR2_EHTR_8_CYCLE=y
+CONFIG_OR2_EAD_EXTRA=y
+CONFIG_ELBC_BR3_OR3=y
+CONFIG_BR3_OR3_NAME="CF"
+CONFIG_BR3_OR3_BASE=0xF0000000
+CONFIG_BR3_PORTSIZE_16BIT=y
+CONFIG_BR3_MACHINE_UPMA=y
+CONFIG_OR3_BI_BURSTINHIBIT=y
+CONFIG_HID0_FINAL_ICE=y
+CONFIG_HID2_HBE=y
+CONFIG_ACR_PIPE_DEP_4=y
+CONFIG_ACR_RPTCNT_4=y
+CONFIG_SPCR_TSEC1EP_3=y
+CONFIG_SPCR_TSEC2EP_3=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=6
@@ -107,13 +170,22 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_ENV_ADDR=0xFE080000
 CONFIG_SATA_SIL3114=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y