spl: spl_nand.c: Add NAND loading message

[oweals/u-boot.git] / common / spl / spl_fit.c

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f08e5018c3f31b9da3afbf3c3a7f140269e105a4..c9bfe0cc8aee0808248a61ea0d347a4954b18e6d 100644 (file)
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <fpga.h>
 #include <image.h>
 #include <linux/libfdt.h>
 #include <spl.h>
@@ -14,6 +15,15 @@
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)
 #endif
 
+__weak void board_spl_fit_post_load(ulong load_addr, size_t length)
+{
+}
+
+__weak ulong board_spl_fit_size_align(ulong size)
+{
+       return size;
+}
+
 /**
  * spl_fit_get_image_name(): By using the matching configuration subnode,
  * retrieve the name of an image, specified by a property name and an index
@@ -140,14 +150,6 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size,
        return (data_size + info->bl_len - 1) / info->bl_len;
 }
 
-#ifdef CONFIG_SPL_FPGA_SUPPORT
-__weak int spl_load_fpga_image(struct spl_load_info *info, size_t length,
-                              int nr_sectors, int sector_offset)
-{
-       return 0;
-}
-#endif
-
 /**
  * spl_load_fit_image(): load the image described in a certain FIT node
  * @info:      points to information about the device to load data from
@@ -169,7 +171,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
                              void *fit, ulong base_offset, int node,
                              struct spl_image_info *image_info)
 {
-       int offset, sector_offset;
+       int offset;
        size_t length;
        int len;
        ulong size;
@@ -217,16 +219,9 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 
                overhead = get_aligned_image_overhead(info, offset);
                nr_sectors = get_aligned_image_size(info, length, offset);
-               sector_offset = sector + get_aligned_image_offset(info, offset);
 
-#ifdef CONFIG_SPL_FPGA_SUPPORT
-               if (type == IH_TYPE_FPGA) {
-                       return spl_load_fpga_image(info, length, nr_sectors,
-                                                  sector_offset);
-               }
-#endif
-
-               if (info->read(info, sector_offset,
+               if (info->read(info,
+                              sector + get_aligned_image_offset(info, offset),
                               nr_sectors, (void *)load_ptr) != nr_sectors)
                        return -EIO;
 
@@ -257,10 +252,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
        board_fit_image_post_process(&src, &length);
 #endif
 
-       if (IS_ENABLED(CONFIG_SPL_OS_BOOT)      &&
-           IS_ENABLED(CONFIG_SPL_GZIP)         &&
-           image_comp == IH_COMP_GZIP          &&
-           type == IH_TYPE_KERNEL) {
+       if (IS_ENABLED(CONFIG_SPL_GZIP) && image_comp == IH_COMP_GZIP) {
                size = length;
                if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
                           src, &size)) {
@@ -367,6 +359,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
         */
        size = fdt_totalsize(fit);
        size = (size + 3) & ~3;
+       size = board_spl_fit_size_align(size);
        base_offset = (size + 3) & ~3;
 
        /*
@@ -390,8 +383,9 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
        fit = spl_get_load_buffer(-hsize, hsize);
        sectors = get_aligned_image_size(info, size, 0);
        count = info->read(info, sector, sectors, fit);
-       debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu\n",
-             sector, sectors, fit, count);
+       debug("fit read sector %lx, sectors=%d, dst=%p, count=%lu, size=0x%lx\n",
+             sector, sectors, fit, count, size);
+
        if (count == 0)
                return -EIO;
 
@@ -412,6 +406,18 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
                        printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
                        return ret;
                }
+
+               debug("FPGA bitstream at: %x, size: %x\n",
+                     (u32)spl_image->load_addr, spl_image->size);
+
+               ret = fpga_load(0, (const void *)spl_image->load_addr,
+                               spl_image->size, BIT_FULL);
+               if (ret) {
+                       printf("%s: Cannot load the image to the FPGA\n",
+                              __func__);
+                       return ret;
+               }
+
                puts("FPGA image loaded from FIT\n");
                node = -1;
        }
@@ -485,6 +491,10 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 
                if (!spl_fit_image_get_os(fit, node, &os_type))
                        debug("Loadable is %s\n", genimg_get_os_name(os_type));
+#if CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
+               else
+                       os_type = IH_OS_U_BOOT;
+#endif
 
                if (os_type == IH_OS_U_BOOT) {
                        spl_fit_append_fdt(&image_info, info, sector,
@@ -515,5 +525,11 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
        if (spl_image->entry_point == FDT_ERROR || spl_image->entry_point == 0)
                spl_image->entry_point = spl_image->load_addr;
 
+       spl_image->flags |= SPL_FIT_FOUND;
+
+#ifdef CONFIG_SECURE_BOOT
+       board_spl_fit_post_load((ulong)fit, size);
+#endif
+
        return 0;
 }