+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007
* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
*
* Copyright 2010-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
-#include <inttypes.h>
+#include <mapmem.h>
#include <stdio_dev.h>
#include <linux/ctype.h>
#include <linux/types.h>
#include <asm/global_data.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
#include <fdt_support.h>
#include <exports.h>
#include <fdtdec.h>
return err;
}
- serial = getenv("serial#");
+ serial = env_get("serial#");
if (serial) {
err = fdt_setprop(fdt, 0, "serial-number", serial,
strlen(serial) + 1);
if (nodeoffset < 0)
return nodeoffset;
- str = getenv("bootargs");
+ str = env_get("bootargs");
if (str) {
err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
strlen(str) + 1);
return p - (char *)buf;
}
-#ifdef CONFIG_NR_DRAM_BANKS
+#if CONFIG_NR_DRAM_BANKS > 4
#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
#else
#define MEMORY_BANKS_MAX 4
int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
{
int err, nodeoffset;
- int len;
+ int len, i;
u8 tmp[MEMORY_BANKS_MAX * 16]; /* Up to 64-bit address + 64-bit size */
if (banks > MEMORY_BANKS_MAX) {
return err;
}
+ for (i = 0; i < banks; i++) {
+ if (start[i] == 0 && size[i] == 0)
+ break;
+ }
+
+ banks = i;
+
if (!banks)
return 0;
void fdt_fixup_ethernet(void *fdt)
{
- int i, j, prop;
+ int i = 0, j, prop;
char *tmp, *end;
char mac[16];
const char *path;
- unsigned char mac_addr[6];
+ unsigned char mac_addr[ARP_HLEN];
int offset;
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+ int nodeoff;
+ const struct fdt_property *fdt_prop;
+#endif
if (fdt_path_offset(fdt, "/aliases") < 0)
return;
/* Cycle through all aliases */
for (prop = 0; ; prop++) {
const char *name;
- int len = strlen("ethernet");
/* FDT might have been edited, recompute the offset */
offset = fdt_first_property_offset(fdt,
fdt_path_offset(fdt, "/aliases"));
/* Select property number 'prop' */
- for (i = 0; i < prop; i++)
+ for (j = 0; j < prop; j++)
offset = fdt_next_property_offset(fdt, offset);
if (offset < 0)
break;
path = fdt_getprop_by_offset(fdt, offset, &name, NULL);
- if (!strncmp(name, "ethernet", len)) {
- i = trailing_strtol(name);
+ if (!strncmp(name, "ethernet", 8)) {
+ /* Treat plain "ethernet" same as "ethernet0". */
+ if (!strcmp(name, "ethernet")
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+ || !strcmp(name, "ethernet0")
+#endif
+ )
+ i = 0;
+#ifndef FDT_SEQ_MACADDR_FROM_ENV
+ else
+ i = trailing_strtol(name);
+#endif
if (i != -1) {
if (i == 0)
strcpy(mac, "ethaddr");
} else {
continue;
}
- tmp = getenv(mac);
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+ nodeoff = fdt_path_offset(fdt, path);
+ fdt_prop = fdt_get_property(fdt, nodeoff, "status",
+ NULL);
+ if (fdt_prop && !strcmp(fdt_prop->data, "disabled"))
+ continue;
+ i++;
+#endif
+ tmp = env_get(mac);
if (!tmp)
continue;
}
}
+int fdt_record_loadable(void *blob, u32 index, const char *name,
+ uintptr_t load_addr, u32 size, uintptr_t entry_point,
+ const char *type, const char *os)
+{
+ int err, node;
+
+ err = fdt_check_header(blob);
+ if (err < 0) {
+ printf("%s: %s\n", __func__, fdt_strerror(err));
+ return err;
+ }
+
+ /* find or create "/fit-images" node */
+ node = fdt_find_or_add_subnode(blob, 0, "fit-images");
+ if (node < 0)
+ return node;
+
+ /* find or create "/fit-images/<name>" node */
+ node = fdt_find_or_add_subnode(blob, node, name);
+ if (node < 0)
+ return node;
+
+ /*
+ * We record these as 32bit entities, possibly truncating addresses.
+ * However, spl_fit.c is not 64bit safe either: i.e. we should not
+ * have an issue here.
+ */
+ fdt_setprop_u32(blob, node, "load-addr", load_addr);
+ if (entry_point != -1)
+ fdt_setprop_u32(blob, node, "entry-point", entry_point);
+ fdt_setprop_u32(blob, node, "size", size);
+ if (type)
+ fdt_setprop_string(blob, node, "type", type);
+ if (os)
+ fdt_setprop_string(blob, node, "os", os);
+
+ return node;
+}
+
/* Resize the fdt to its actual size + a bit of padding */
int fdt_shrink_to_minimum(void *blob, uint extrasize)
{
fdt_set_totalsize(blob, actualsize);
/* Add the new reservation */
- ret = fdt_add_mem_rsv(blob, (uintptr_t)blob, actualsize);
+ ret = fdt_add_mem_rsv(blob, map_to_sysmem(blob), actualsize);
if (ret < 0)
return ret;
}
#endif
-#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
-/*
- * Provide a weak default function to return the flash bank size.
- * There might be multiple non-identical flash chips connected to one
- * chip-select, so we need to pass an index as well.
- */
-u32 __flash_get_bank_size(int cs, int idx)
-{
- extern flash_info_t flash_info[];
-
- /*
- * As default, a simple 1:1 mapping is provided. Boards with
- * a different mapping need to supply a board specific mapping
- * routine.
- */
- return flash_info[cs].size;
-}
-u32 flash_get_bank_size(int cs, int idx)
- __attribute__((weak, alias("__flash_get_bank_size")));
-
-/*
- * This function can be used to update the size in the "reg" property
- * of all NOR FLASH device nodes. This is necessary for boards with
- * non-fixed NOR FLASH sizes.
- */
-int fdt_fixup_nor_flash_size(void *blob)
-{
- char compat[][16] = { "cfi-flash", "jedec-flash" };
- int off;
- int len;
- struct fdt_property *prop;
- u32 *reg, *reg2;
- int i;
-
- for (i = 0; i < 2; i++) {
- off = fdt_node_offset_by_compatible(blob, -1, compat[i]);
- while (off != -FDT_ERR_NOTFOUND) {
- int idx;
-
- /*
- * Found one compatible node, so fixup the size
- * int its reg properties
- */
- prop = fdt_get_property_w(blob, off, "reg", &len);
- if (prop) {
- int tuple_size = 3 * sizeof(reg);
-
- /*
- * There might be multiple reg-tuples,
- * so loop through them all
- */
- reg = reg2 = (u32 *)&prop->data[0];
- for (idx = 0; idx < (len / tuple_size); idx++) {
- /*
- * Update size in reg property
- */
- reg[2] = flash_get_bank_size(reg[0],
- idx);
-
- /*
- * Point to next reg tuple
- */
- reg += 3;
- }
-
- fdt_setprop(blob, off, "reg", reg2, len);
- }
-
- /* Move to next compatible node */
- off = fdt_node_offset_by_compatible(blob, off,
- compat[i]);
- }
- }
-
- return 0;
-}
-#endif
-
int fdt_increase_size(void *fdt, int add_len)
{
int newlen;
unsigned int r1;
};
-int fdt_del_subnodes(const void *blob, int parent_offset)
+static int fdt_del_subnodes(const void *blob, int parent_offset)
{
int off, ndepth;
int ret;
return 0;
}
-int fdt_del_partitions(void *blob, int parent_offset)
+static int fdt_del_partitions(void *blob, int parent_offset)
{
const void *prop;
int ndepth = 0;
*
* fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
*/
-void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size)
+void fdt_fixup_mtdparts(void *blob, const struct node_info *node_info,
+ int node_info_size)
{
- struct node_info *ni = node_info;
struct mtd_device *dev;
int i, idx;
int noff;
for (i = 0; i < node_info_size; i++) {
idx = 0;
- noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat);
+ noff = fdt_node_offset_by_compatible(blob, -1,
+ node_info[i].compat);
while (noff != -FDT_ERR_NOTFOUND) {
debug("%s: %s, mtd dev type %d\n",
fdt_get_name(blob, noff, 0),
- ni[i].compat, ni[i].type);
- dev = device_find(ni[i].type, idx++);
+ node_info[i].compat, node_info[i].type);
+ dev = device_find(node_info[i].type, idx++);
if (dev) {
if (fdt_node_set_part_info(blob, noff, dev))
return; /* return on error */
/* Jump to next flash node */
noff = fdt_node_offset_by_compatible(blob, noff,
- ni[i].compat);
+ node_info[i].compat);
}
}
}
};
/* Default translator (generic bus) */
-void of_bus_default_count_cells(const void *blob, int parentoffset,
+void fdt_support_default_count_cells(const void *blob, int parentoffset,
int *addrc, int *sizec)
{
const fdt32_t *prop;
{
u64 cp, s, da;
- cp = of_read_number(range, na);
- s = of_read_number(range + na + pna, ns);
- da = of_read_number(addr, na);
+ cp = fdt_read_number(range, na);
+ s = fdt_read_number(range + na + pna, ns);
+ da = fdt_read_number(addr, na);
- debug("OF: default map, cp=%" PRIu64 ", s=%" PRIu64
- ", da=%" PRIu64 "\n", cp, s, da);
+ debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
if (da < cp || da >= (cp + s))
return OF_BAD_ADDR;
static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na)
{
- u64 a = of_read_number(addr, na);
+ u64 a = fdt_read_number(addr, na);
memset(addr, 0, na * 4);
a += offset;
if (na > 1)
if ((addr[0] ^ range[0]) & cpu_to_be32(1))
return OF_BAD_ADDR;
- cp = of_read_number(range + 1, na - 1);
- s = of_read_number(range + na + pna, ns);
- da = of_read_number(addr + 1, na - 1);
+ cp = fdt_read_number(range + 1, na - 1);
+ s = fdt_read_number(range + na + pna, ns);
+ da = fdt_read_number(addr + 1, na - 1);
- debug("OF: ISA map, cp=%" PRIu64 ", s=%" PRIu64
- ", da=%" PRIu64 "\n", cp, s, da);
+ debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
if (da < cp || da >= (cp + s))
return OF_BAD_ADDR;
{
.name = "default",
.addresses = "reg",
- .count_cells = of_bus_default_count_cells,
+ .count_cells = fdt_support_default_count_cells,
.map = of_bus_default_map,
.translate = of_bus_default_translate,
},
*/
ranges = fdt_getprop(blob, parent, rprop, &rlen);
if (ranges == NULL || rlen == 0) {
- offset = of_read_number(addr, na);
+ offset = fdt_read_number(addr, na);
memset(addr, 0, pna * 4);
debug("OF: no ranges, 1:1 translation\n");
goto finish;
finish:
of_dump_addr("OF: parent translation for:", addr, pna);
- debug("OF: with offset: %" PRIu64 "\n", offset);
+ debug("OF: with offset: %llu\n", offset);
/* Translate it into parent bus space */
return pbus->translate(addr, offset, pna);
/* If root, we have finished */
if (parent < 0) {
debug("OF: reached root node\n");
- result = of_read_number(addr, na);
+ result = fdt_read_number(addr, na);
break;
}
dt_addr = fdt_translate_address(fdt, node, reg);
if (addr != dt_addr) {
- printf("Warning: U-Boot configured device %s at address %"
- PRIx64 ",\n but the device tree has it address %"
- PRIx64 ".\n", alias, addr, dt_addr);
+ printf("Warning: U-Boot configured device %s at address %llu,\n"
+ "but the device tree has it address %llx.\n",
+ alias, addr, dt_addr);
return 0;
}
/*
* Returns the base address of an SOC or PCI node
*/
-u64 fdt_get_base_address(void *fdt, int node)
+u64 fdt_get_base_address(const void *fdt, int node)
{
int size;
- u32 naddr;
const fdt32_t *prop;
- naddr = fdt_address_cells(fdt, node);
-
- prop = fdt_getprop(fdt, node, "ranges", &size);
+ prop = fdt_getprop(fdt, node, "reg", &size);
- return prop ? fdt_translate_address(fdt, node, prop + naddr) : 0;
+ return prop ? fdt_translate_address(fdt, node, prop) : 0;
}
/*
fdt32_t cells[4];
int i, addrc, sizec, ret;
- of_bus_default_count_cells(fdt, fdt_parent_offset(fdt, node),
- &addrc, &sizec);
+ fdt_support_default_count_cells(fdt, fdt_parent_offset(fdt, node),
+ &addrc, &sizec);
i = 0;
if (addrc == 2)
cells[i++] = cpu_to_fdt32(base_address >> 32);
if (ret < 0)
return ret;
- snprintf(name, sizeof(name), "framebuffer@%" PRIx64, base_address);
+ snprintf(name, sizeof(name), "framebuffer@%llx", base_address);
ret = fdt_set_name(fdt, node, name);
if (ret < 0)
return ret;
}
return toff;
}
+
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+/**
+ * fdt_overlay_apply_verbose - Apply an overlay with verbose error reporting
+ *
+ * @fdt: ptr to device tree
+ * @fdto: ptr to device tree overlay
+ *
+ * Convenience function to apply an overlay and display helpful messages
+ * in the case of an error
+ */
+int fdt_overlay_apply_verbose(void *fdt, void *fdto)
+{
+ int err;
+ bool has_symbols;
+
+ err = fdt_path_offset(fdt, "/__symbols__");
+ has_symbols = err >= 0;
+
+ err = fdt_overlay_apply(fdt, fdto);
+ if (err < 0) {
+ printf("failed on fdt_overlay_apply(): %s\n",
+ fdt_strerror(err));
+ if (!has_symbols) {
+ printf("base fdt does did not have a /__symbols__ node\n");
+ printf("make sure you've compiled with -@\n");
+ }
+ }
+ return err;
+}
+#endif
projects / oweals / u-boot.git / blobdiff