* (C) Copyright 2000, 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
* Support for read and write access to EEPROM like memory devices. This
* includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
* FRAM devices read and write data at bus speed. In particular, there is no
- * write delay. Also, there is no limit imposed on the numer of bytes that can
+ * write delay. Also, there is no limit imposed on the number of bytes that can
* be transferred with a single read or write.
*
* Use the following configuration options to ensure no unneeded performance
* degradation (typical for EEPROM) is incured for FRAM memory:
*
- * #define CFG_I2C_FRAM
- * #undef CFG_EEPROM_PAGE_WRITE_DELAY_MS
+ * #define CONFIG_SYS_I2C_FRAM
+ * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
*
*/
#include <command.h>
#include <i2c.h>
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
-
extern void eeprom_init (void);
extern int eeprom_read (unsigned dev_addr, unsigned offset,
uchar *buffer, unsigned cnt);
extern int eeprom_write (unsigned dev_addr, unsigned offset,
uchar *buffer, unsigned cnt);
+#if defined(CONFIG_SYS_EEPROM_WREN)
+extern int eeprom_write_enable (unsigned dev_addr, int state);
#endif
-#if defined(CFG_EEPROM_X40430)
+#if defined(CONFIG_SYS_EEPROM_X40430)
/* Maximum number of times to poll for acknowledge after write */
#define MAX_ACKNOWLEDGE_POLLS 10
#endif
/* ------------------------------------------------------------------------- */
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
-int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+#if defined(CONFIG_CMD_EEPROM)
+static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
const char *const fmt =
"\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
-#if defined(CFG_I2C_MULTI_EEPROMS)
+#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
if (argc == 6) {
ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
ulong addr = simple_strtoul (argv[3], NULL, 16);
ulong cnt = simple_strtoul (argv[5], NULL, 16);
#else
if (argc == 5) {
- ulong dev_addr = CFG_DEF_EEPROM_ADDR;
+ ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
ulong addr = simple_strtoul (argv[2], NULL, 16);
ulong off = simple_strtoul (argv[3], NULL, 16);
ulong cnt = simple_strtoul (argv[4], NULL, 16);
-#endif /* CFG_I2C_MULTI_EEPROMS */
+#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
-# ifndef CONFIG_SPI
+# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
eeprom_init ();
# endif /* !CONFIG_SPI */
}
}
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
+ return CMD_RET_USAGE;
}
-#endif /* CFG_CMD_EEPROM */
+#endif
/*-----------------------------------------------------------------------
*
- * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
+ * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
* 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
*
- * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
+ * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
* 0x00000nxx for EEPROM address selectors and page number at n.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
-
-#ifndef CONFIG_SPI
-#if !defined(CFG_I2C_EEPROM_ADDR_LEN) || CFG_I2C_EEPROM_ADDR_LEN < 1 || CFG_I2C_EEPROM_ADDR_LEN > 2
-#error CFG_I2C_EEPROM_ADDR_LEN must be 1 or 2
+#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
+#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
+#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
#endif
#endif
*/
while (offset < end) {
unsigned alen, len;
-#if !defined(CFG_I2C_FRAM)
+#if !defined(CONFIG_SYS_I2C_FRAM)
unsigned maxlen;
#endif
-#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
+#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
uchar addr[2];
blk_off = offset & 0xFF; /* block offset */
addr[1] = offset >> 8; /* upper address octet */
addr[2] = blk_off; /* lower address octet */
alen = 3;
-#endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
+#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
addr[0] |= dev_addr; /* insert device address */
* bytes that can be ccessed with the single read or write
* operation.
*/
-#if !defined(CFG_I2C_FRAM)
+#if !defined(CONFIG_SYS_I2C_FRAM)
maxlen = 0x100 - blk_off;
if (maxlen > I2C_RXTX_LEN)
maxlen = I2C_RXTX_LEN;
len = maxlen;
#endif
-#ifdef CONFIG_SPI
+#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_read (addr, alen, buffer, len);
#else
- if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0)
+#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
+ i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
+#endif
+ if (i2c_read(addr[0], offset, alen - 1, buffer, len))
rcode = 1;
#endif
buffer += len;
/*-----------------------------------------------------------------------
*
- * for CFG_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
+ * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
* 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
*
- * for CFG_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
+ * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
* 0x00000nxx for EEPROM address selectors and page number at n.
*/
unsigned blk_off;
int rcode = 0;
-#if defined(CFG_EEPROM_X40430)
+#if defined(CONFIG_SYS_EEPROM_X40430)
uchar contr_r_addr[2];
uchar addr_void[2];
uchar contr_reg[2];
int i;
#endif
+#if defined(CONFIG_SYS_EEPROM_WREN)
+ eeprom_write_enable (dev_addr,1);
+#endif
/* Write data until done or would cross a write page boundary.
* We must write the address again when changing pages
* because the address counter only increments within a page.
while (offset < end) {
unsigned alen, len;
-#if !defined(CFG_I2C_FRAM)
+#if !defined(CONFIG_SYS_I2C_FRAM)
unsigned maxlen;
#endif
-#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
+#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
uchar addr[2];
blk_off = offset & 0xFF; /* block offset */
addr[1] = offset >> 8; /* upper address octet */
addr[2] = blk_off; /* lower address octet */
alen = 3;
-#endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
+#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
addr[0] |= dev_addr; /* insert device address */
/*
* For a FRAM device there is no limit on the number of the
- * bytes that can be ccessed with the single read or write
+ * bytes that can be accessed with the single read or write
* operation.
*/
-#if !defined(CFG_I2C_FRAM)
+#if !defined(CONFIG_SYS_I2C_FRAM)
-#if defined(CFG_EEPROM_PAGE_WRITE_BITS)
+#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
-#define EEPROM_PAGE_SIZE (1 << CFG_EEPROM_PAGE_WRITE_BITS)
+#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
len = maxlen;
#endif
-#ifdef CONFIG_SPI
+#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_write (addr, alen, buffer, len);
#else
-#if defined(CFG_EEPROM_X40430)
+#if defined(CONFIG_SYS_EEPROM_X40430)
/* Get the value of the control register.
* Set current address (internal pointer in the x40430)
* to 0x1ff.
contr_r_addr[1] = 0xff;
addr_void[0] = 0;
addr_void[1] = addr[1];
-#ifdef CFG_I2C_EEPROM_ADDR
- contr_r_addr[0] |= CFG_I2C_EEPROM_ADDR;
- addr_void[0] |= CFG_I2C_EEPROM_ADDR;
+#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
+ contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
+ addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
#endif
contr_reg[0] = 0xff;
if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
break; /* got ack */
-#if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
- udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
+ udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
}
if (i == MAX_ACKNOWLEDGE_POLLS) {
/* Write is enabled ... now write eeprom value.
*/
#endif
- if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0)
+#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
+ i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
+#endif
+ if (i2c_write(addr[0], offset, alen - 1, buffer, len))
rcode = 1;
#endif
buffer += len;
offset += len;
-#if defined(CFG_EEPROM_PAGE_WRITE_DELAY_MS)
- udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
+ udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
}
+#if defined(CONFIG_SYS_EEPROM_WREN)
+ eeprom_write_enable (dev_addr,0);
+#endif
return rcode;
}
-#ifndef CONFIG_SPI
+#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
int
eeprom_probe (unsigned dev_addr, unsigned offset)
{
/* Probe the chip address
*/
-#if CFG_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
+#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
chip = offset >> 8; /* block number */
#else
chip = offset >> 16; /* block number */
-#endif /* CFG_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
+#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
chip |= dev_addr; /* insert device address */
/*-----------------------------------------------------------------------
* Set default values
*/
-#ifndef CFG_I2C_SPEED
-#define CFG_I2C_SPEED 50000
-#endif
-
-#ifndef CFG_I2C_SLAVE
-#define CFG_I2C_SLAVE 0xFE
+#ifndef CONFIG_SYS_I2C_SPEED
+#define CONFIG_SYS_I2C_SPEED 50000
#endif
void eeprom_init (void)
{
-#if defined(CONFIG_SPI)
+
+#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_init_f ();
#endif
-#if defined(CONFIG_HARD_I2C) || \
- defined(CONFIG_SOFT_I2C)
- i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
+ i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
}
+
/*-----------------------------------------------------------------------
*/
-#endif /* CFG_CMD_EEPROM */
+
/***************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
+#if defined(CONFIG_CMD_EEPROM)
-#ifdef CFG_I2C_MULTI_EEPROMS
+#ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
U_BOOT_CMD(
eeprom, 6, 1, do_eeprom,
- "eeprom - EEPROM sub-system\n",
+ "EEPROM sub-system",
"read devaddr addr off cnt\n"
"eeprom write devaddr addr off cnt\n"
- " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'\n"
-);
+ " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
+)
#else /* One EEPROM */
U_BOOT_CMD(
eeprom, 5, 1, do_eeprom,
- "eeprom - EEPROM sub-system\n",
+ "EEPROM sub-system",
"read addr off cnt\n"
"eeprom write addr off cnt\n"
- " - read/write `cnt' bytes at EEPROM offset `off'\n"
-);
-#endif /* CFG_I2C_MULTI_EEPROMS */
+ " - read/write `cnt' bytes at EEPROM offset `off'"
+)
+#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
-#endif /* CFG_CMD_EEPROM */
+#endif