* available to cmd_fat.c:get_dev and filling in a block device
* description that has all the bits needed for FAT support to
* read sectors.
+ *
+ * According to Xilinx technical support, before accessing the
+ * SystemACE CF you need to set the following control bits:
+ * FORCECFGMODE : 1
+ * CFGMODE : 0
+ * CFGSTART : 0
*/
# include <common.h>
*/
static unsigned ace_readw(unsigned offset)
{
- return readw(CFG_SYSTEMACE_BASE+offset);
+#if (CFG_SYSTEMACE_WIDTH == 8)
+ u16 temp;
+
+#if !defined(__BIG_ENDIAN)
+ temp =((u16)readb(CFG_SYSTEMACE_BASE+offset) << 8);
+ temp |= (u16)readb(CFG_SYSTEMACE_BASE+offset+1);
+#else
+ temp = (u16)readb(CFG_SYSTEMACE_BASE+offset);
+ temp |=((u16)readb(CFG_SYSTEMACE_BASE+offset+1) << 8);
+#endif
+ return temp;
+#else
+ return readw(CFG_SYSTEMACE_BASE+offset);
+#endif
}
-static unsigned ace_writew(unsigned val, unsigned offset)
+static void ace_writew(unsigned val, unsigned offset)
{
- writew(val, CFG_SYSTEMACE_BASE+offset);
+#if (CFG_SYSTEMACE_WIDTH == 8)
+#if !defined(__BIG_ENDIAN)
+ writeb((u8)(val>>8), CFG_SYSTEMACE_BASE+offset);
+ writeb((u8)val, CFG_SYSTEMACE_BASE+offset+1);
+#else
+ writeb((u8)val, CFG_SYSTEMACE_BASE+offset);
+ writeb((u8)(val>>8), CFG_SYSTEMACE_BASE+offset+1);
+#endif
+#else
+ writew(val, CFG_SYSTEMACE_BASE+offset);
+#endif
}
/* */
int retry = 10;
/* CONTROLREG = LOCKREG */
- ace_writew(0x0002, 0x18);
+ unsigned val=ace_readw(0x18);
+ val|=0x0002;
+ ace_writew((val&0xffff), 0x18);
/* Wait for MPULOCK in STATUSREG[15:0] */
while (! (ace_readw(0x04) & 0x0002)) {
static void release_cf_lock(void)
{
- /* CONTROLREG = none */
- ace_writew(0x0000, 0x18);
+ unsigned val=ace_readw(0x18);
+ val&=~(0x0002);
+ ace_writew((val&0xffff), 0x18);
}
block_dev_desc_t * systemace_get_dev(int dev)
not yet initialized. In that case, fill it in. */
if (systemace_dev.blksz == 0) {
systemace_dev.if_type = IF_TYPE_UNKNOWN;
+ systemace_dev.dev = 0;
systemace_dev.part_type = PART_TYPE_UNKNOWN;
systemace_dev.type = DEV_TYPE_HARDDISK;
systemace_dev.blksz = 512;
systemace_dev.removable = 1;
systemace_dev.block_read = systemace_read;
+
+ init_part(&systemace_dev);
+
}
return &systemace_dev;
unsigned long blkcnt,
unsigned long *buffer)
{
- unsigned val;
int retry;
unsigned blk_countdown;
unsigned char*dp = (unsigned char*)buffer;
+ unsigned val;
if (get_cf_lock() < 0) {
unsigned status = ace_readw(0x04);
retry = 2000;
for (;;) {
- unsigned val = ace_readw(0x04);
+ val = ace_readw(0x04);
/* If CFDETECT is false, card is missing. */
if (! (val & 0x0010)) {
/* Write sector count | ReadMemCardData. */
ace_writew((trans&0xff) | 0x0300, 0x14);
- /* CONTROLREG = CFGRESET|LOCKREQ */
- ace_writew(0x0082, 0x18);
+ /* Reset the configruation controller */
+ val = ace_readw(0x18);
+ val|=0x0080;
+ ace_writew(val, 0x18);
retry = trans * 16;
while (retry > 0) {
/* Wait for buffer to become ready. */
while (! (ace_readw(0x04) & 0x0020)) {
- udelay(1000);
+ udelay(100);
}
/* Read 16 words of 2bytes from the sector buffer. */
retry -= 1;
}
+ /* Clear the configruation controller reset */
+ val = ace_readw(0x18);
+ val&=~0x0080;
+ ace_writew(val, 0x18);
+
/* Count the blocks we transfer this time. */
start += trans;
blk_countdown -= trans;
return blkcnt;
}
-#endif
+#endif /* CONFIG_SYSTEMACE */