Merge branch 'master' of git://www.denx.de/git/u-boot-socfpga

[oweals/u-boot.git] / common / board_r.c

diff --git a/common/board_r.c b/common/board_r.c
index 4fcd4f6a7057e3ba8afeb985869f358718fa7c66..307124ed8049a0c574042b8b34548e8551373e88 100644 (file)
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -33,6 +33,7 @@
 #endif
 #include <logbuff.h>
 #include <malloc.h>
+#include <mapmem.h>
 #ifdef CONFIG_BITBANGMII
 #include <miiphy.h>
 #endif
@@ -167,14 +168,17 @@ static int initr_serial(void)
        return 0;
 }
 
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 static int initr_trap(void)
 {
        /*
         * Setup trap handlers
         */
+#if defined(CONFIG_PPC)
        trap_init(gd->relocaddr);
-
+#else
+       trap_init(CONFIG_SYS_SDRAM_BASE);
+#endif
        return 0;
 }
 #endif
@@ -227,7 +231,9 @@ static int initr_unlock_ram_in_cache(void)
 #ifdef CONFIG_PCI
 static int initr_pci(void)
 {
+#ifndef CONFIG_DM_PCI
        pci_init();
+#endif
 
        return 0;
 }
@@ -584,7 +590,7 @@ static int initr_bbmii(void)
 static int initr_net(void)
 {
        puts("Net:   ");
-       eth_initialize(gd->bd);
+       eth_initialize();
 #if defined(CONFIG_RESET_PHY_R)
        debug("Reset Ethernet PHY\n");
        reset_phy();
@@ -696,6 +702,12 @@ init_fnc_t init_sequence_r[] = {
        /* TODO: could x86/PPC have this also perhaps? */
 #ifdef CONFIG_ARM
        initr_caches,
+       /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR.
+        *       A temporary mapping of IFC high region is since removed,
+        *       so environmental variables in NOR flash is not availble
+        *       until board_init() is called below to remap IFC to high
+        *       region.
+        */
 #endif
        initr_reloc_global_data,
 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
@@ -729,7 +741,7 @@ init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
        initr_manual_reloc_cmdtable,
 #endif
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
        initr_trap,
 #endif
 #ifdef CONFIG_ADDR_MAP
@@ -767,16 +779,13 @@ init_fnc_t init_sequence_r[] = {
        initr_flash,
 #endif
        INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_PPC)
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
        /* initialize higher level parts of CPU like time base and timers */
        cpu_init_r,
 #endif
 #ifdef CONFIG_PPC
        initr_spi,
 #endif
-#if defined(CONFIG_X86) && defined(CONFIG_SPI)
-       init_func_spi,
-#endif
 #ifdef CONFIG_CMD_NAND
        initr_nand,
 #endif
@@ -831,7 +840,8 @@ init_fnc_t init_sequence_r[] = {
 #if defined(CONFIG_ARM) || defined(CONFIG_AVR32)
        initr_enable_interrupts,
 #endif
-#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
+#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) \
+       || defined(CONFIG_M68K)
        timer_init,             /* initialize timer */
 #endif
 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)