Merge git://git.denx.de/u-boot-x86

[oweals/u-boot.git] / cmd / clk.c

diff --git a/cmd/clk.c b/cmd/clk.c
index 6d3d46a184474be04b4b50a101fe47b98251cbb6..fd4231589c5cb4d70cc69a9d613a26d504777d8d 100644 (file)
--- a/cmd/clk.c
+++ b/cmd/clk.c
@@ -1,22 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2013 Xilinx, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
 #include <command.h>
 #include <clk.h>
+#if defined(CONFIG_DM) && defined(CONFIG_CLK)
+#include <dm.h>
+#include <dm/device-internal.h>
+#endif
 
 int __weak soc_clk_dump(void)
 {
+#if defined(CONFIG_DM) && defined(CONFIG_CLK)
+       struct udevice *dev;
+       struct uclass *uc;
+       struct clk clk;
+       int ret;
+
+       /* Device addresses start at 1 */
+       ret = uclass_get(UCLASS_CLK, &uc);
+       if (ret)
+               return ret;
+
+       uclass_foreach_dev(dev, uc) {
+               memset(&clk, 0, sizeof(clk));
+               ret = device_probe(dev);
+               if (ret) {
+                       printf("%-30.30s : ? Hz\n", dev->name);
+                       continue;
+               }
+
+               ret = clk_request(dev, &clk);
+               if (ret) {
+                       printf("%-30.30s : ? Hz\n", dev->name);
+                       continue;
+               }
+
+               printf("%-30.30s : %lu Hz\n", dev->name, clk_get_rate(&clk));
+
+               clk_free(&clk);
+       }
+
+       return 0;
+#else
        puts("Not implemented\n");
        return 1;
+#endif
 }
 
 static int do_clk_dump(cmd_tbl_t *cmdtp, int flag, int argc,
                       char *const argv[])
 {
-       return soc_clk_dump();
+       int ret;
+
+       ret = soc_clk_dump();
+       if (ret < 0) {
+               printf("Clock dump error %d\n", ret);
+               ret = CMD_RET_FAILURE;
+       }
+
+       return ret;
 }
 
 static cmd_tbl_t cmd_clk_sub[] = {