fpga: zynqpl: Add support for zc7100 device.

[oweals/u-boot.git] / board / xilinx / zynq / board.c

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 1589d21073befaaca369b7fbaacb09e4b5bd0d63..c173f0cc51f498b1c1c9cf7514f28b0ec1d8223d 100644 (file)
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -1,36 +1,61 @@
 /*
  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+ 
  */
 
 #include <common.h>
 #include <netdev.h>
+#include <zynqpl.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_FPGA
+Xilinx_desc fpga;
+
+/* It can be done differently */
+Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
+Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
+Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
+Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
+Xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
+#endif
+
 int board_init(void)
 {
+#ifdef CONFIG_FPGA
+       u32 idcode;
+
+       idcode = zynq_slcr_get_idcode();
+
+       switch (idcode) {
+       case XILINX_ZYNQ_7010:
+               fpga = fpga010;
+               break;
+       case XILINX_ZYNQ_7020:
+               fpga = fpga020;
+               break;
+       case XILINX_ZYNQ_7030:
+               fpga = fpga030;
+               break;
+       case XILINX_ZYNQ_7045:
+               fpga = fpga045;
+               break;
+       case XILINX_ZYNQ_7100:
+               fpga = fpga100;
+               break;
+       }
+#endif
+
        icache_enable();
 
+#ifdef CONFIG_FPGA
+       fpga_init();
+       fpga_add(fpga_xilinx, &fpga);
+#endif
+
        return 0;
 }